altera_edac.c (e8263793b7248ec78316d5915152c105e1034a28) | altera_edac.c (c609581d1f75e6965db8258015f5ae357df477c8) |
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1/* 2 * Copyright Altera Corporation (C) 2014-2016. All rights reserved. 3 * Copyright 2011-2012 Calxeda, Inc. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2, as published by the Free Software Foundation. 8 * --- 1325 unchanged lines hidden (view full) --- 1334{ 1335 return altr_init_a10_ecc_device_type("altr,socfpga-dma-ecc"); 1336} 1337 1338early_initcall(socfpga_init_dma_ecc); 1339 1340#endif /* CONFIG_EDAC_ALTERA_DMA */ 1341 | 1/* 2 * Copyright Altera Corporation (C) 2014-2016. All rights reserved. 3 * Copyright 2011-2012 Calxeda, Inc. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2, as published by the Free Software Foundation. 8 * --- 1325 unchanged lines hidden (view full) --- 1334{ 1335 return altr_init_a10_ecc_device_type("altr,socfpga-dma-ecc"); 1336} 1337 1338early_initcall(socfpga_init_dma_ecc); 1339 1340#endif /* CONFIG_EDAC_ALTERA_DMA */ 1341 |
1342/********************** USB Device Functions **********************/ 1343 1344#ifdef CONFIG_EDAC_ALTERA_USB 1345 1346static const struct edac_device_prv_data a10_usbecc_data = { 1347 .setup = altr_check_ecc_deps, 1348 .ce_clear_mask = ALTR_A10_ECC_SERRPENA, 1349 .ue_clear_mask = ALTR_A10_ECC_DERRPENA, 1350 .dbgfs_name = "altr_trigger", 1351 .ecc_enable_mask = ALTR_A10_COMMON_ECC_EN_CTL, 1352 .ecc_en_ofst = ALTR_A10_ECC_CTRL_OFST, 1353 .ce_set_mask = ALTR_A10_ECC_TSERRA, 1354 .ue_set_mask = ALTR_A10_ECC_TDERRA, 1355 .set_err_ofst = ALTR_A10_ECC_INTTEST_OFST, 1356 .ecc_irq_handler = altr_edac_a10_ecc_irq, 1357 .inject_fops = &altr_edac_a10_device_inject_fops, 1358}; 1359 1360static int __init socfpga_init_usb_ecc(void) 1361{ 1362 return altr_init_a10_ecc_device_type("altr,socfpga-usb-ecc"); 1363} 1364 1365early_initcall(socfpga_init_usb_ecc); 1366 1367#endif /* CONFIG_EDAC_ALTERA_USB */ 1368 |
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1342/********************* Arria10 EDAC Device Functions *************************/ 1343static const struct of_device_id altr_edac_a10_device_of_match[] = { 1344#ifdef CONFIG_EDAC_ALTERA_L2C 1345 { .compatible = "altr,socfpga-a10-l2-ecc", .data = &a10_l2ecc_data }, 1346#endif 1347#ifdef CONFIG_EDAC_ALTERA_OCRAM 1348 { .compatible = "altr,socfpga-a10-ocram-ecc", 1349 .data = &a10_ocramecc_data }, 1350#endif 1351#ifdef CONFIG_EDAC_ALTERA_ETHERNET 1352 { .compatible = "altr,socfpga-eth-mac-ecc", 1353 .data = &a10_enetecc_data }, 1354#endif 1355#ifdef CONFIG_EDAC_ALTERA_NAND 1356 { .compatible = "altr,socfpga-nand-ecc", .data = &a10_nandecc_data }, 1357#endif 1358#ifdef CONFIG_EDAC_ALTERA_DMA 1359 { .compatible = "altr,socfpga-dma-ecc", .data = &a10_dmaecc_data }, 1360#endif | 1369/********************* Arria10 EDAC Device Functions *************************/ 1370static const struct of_device_id altr_edac_a10_device_of_match[] = { 1371#ifdef CONFIG_EDAC_ALTERA_L2C 1372 { .compatible = "altr,socfpga-a10-l2-ecc", .data = &a10_l2ecc_data }, 1373#endif 1374#ifdef CONFIG_EDAC_ALTERA_OCRAM 1375 { .compatible = "altr,socfpga-a10-ocram-ecc", 1376 .data = &a10_ocramecc_data }, 1377#endif 1378#ifdef CONFIG_EDAC_ALTERA_ETHERNET 1379 { .compatible = "altr,socfpga-eth-mac-ecc", 1380 .data = &a10_enetecc_data }, 1381#endif 1382#ifdef CONFIG_EDAC_ALTERA_NAND 1383 { .compatible = "altr,socfpga-nand-ecc", .data = &a10_nandecc_data }, 1384#endif 1385#ifdef CONFIG_EDAC_ALTERA_DMA 1386 { .compatible = "altr,socfpga-dma-ecc", .data = &a10_dmaecc_data }, 1387#endif |
1388#ifdef CONFIG_EDAC_ALTERA_USB 1389 { .compatible = "altr,socfpga-usb-ecc", .data = &a10_usbecc_data }, 1390#endif |
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1361 {}, 1362}; 1363MODULE_DEVICE_TABLE(of, altr_edac_a10_device_of_match); 1364 1365/* 1366 * The Arria10 EDAC Device Functions differ from the Cyclone5/Arria5 1367 * because 2 IRQs are shared among the all ECC peripherals. The ECC 1368 * manager manages the IRQs and the children. --- 275 unchanged lines hidden (view full) --- 1644 for_each_child_of_node(pdev->dev.of_node, child) { 1645 if (!of_device_is_available(child)) 1646 continue; 1647 1648 if (of_device_is_compatible(child, "altr,socfpga-a10-l2-ecc") || 1649 of_device_is_compatible(child, "altr,socfpga-a10-ocram-ecc") || 1650 of_device_is_compatible(child, "altr,socfpga-eth-mac-ecc") || 1651 of_device_is_compatible(child, "altr,socfpga-nand-ecc") || | 1391 {}, 1392}; 1393MODULE_DEVICE_TABLE(of, altr_edac_a10_device_of_match); 1394 1395/* 1396 * The Arria10 EDAC Device Functions differ from the Cyclone5/Arria5 1397 * because 2 IRQs are shared among the all ECC peripherals. The ECC 1398 * manager manages the IRQs and the children. --- 275 unchanged lines hidden (view full) --- 1674 for_each_child_of_node(pdev->dev.of_node, child) { 1675 if (!of_device_is_available(child)) 1676 continue; 1677 1678 if (of_device_is_compatible(child, "altr,socfpga-a10-l2-ecc") || 1679 of_device_is_compatible(child, "altr,socfpga-a10-ocram-ecc") || 1680 of_device_is_compatible(child, "altr,socfpga-eth-mac-ecc") || 1681 of_device_is_compatible(child, "altr,socfpga-nand-ecc") || |
1652 of_device_is_compatible(child, "altr,socfpga-dma-ecc")) | 1682 of_device_is_compatible(child, "altr,socfpga-dma-ecc") || 1683 of_device_is_compatible(child, "altr,socfpga-usb-ecc")) |
1653 1654 altr_edac_a10_device_add(edac, child); 1655 1656 else if (of_device_is_compatible(child, "altr,sdram-edac-a10")) 1657 of_platform_populate(pdev->dev.of_node, 1658 altr_sdram_ctrl_of_match, 1659 NULL, &pdev->dev); 1660 } --- 22 unchanged lines hidden --- | 1684 1685 altr_edac_a10_device_add(edac, child); 1686 1687 else if (of_device_is_compatible(child, "altr,sdram-edac-a10")) 1688 of_platform_populate(pdev->dev.of_node, 1689 altr_sdram_ctrl_of_match, 1690 NULL, &pdev->dev); 1691 } --- 22 unchanged lines hidden --- |