altera_edac.c (c79a14defb3d8344802115e1b2a62d201354dc18) altera_edac.c (c6882fb2e83525e97663df1d2d96f29d034189ab)
1/*
2 * Copyright Altera Corporation (C) 2014-2016. All rights reserved.
3 * Copyright 2011-2012 Calxeda, Inc.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *

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1280{
1281 return altr_init_a10_ecc_device_type("altr,socfpga-eth-mac-ecc");
1282}
1283
1284early_initcall(socfpga_init_ethernet_ecc);
1285
1286#endif /* CONFIG_EDAC_ALTERA_ETHERNET */
1287
1/*
2 * Copyright Altera Corporation (C) 2014-2016. All rights reserved.
3 * Copyright 2011-2012 Calxeda, Inc.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *

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1280{
1281 return altr_init_a10_ecc_device_type("altr,socfpga-eth-mac-ecc");
1282}
1283
1284early_initcall(socfpga_init_ethernet_ecc);
1285
1286#endif /* CONFIG_EDAC_ALTERA_ETHERNET */
1287
1288/********************** NAND Device Functions **********************/
1289
1290#ifdef CONFIG_EDAC_ALTERA_NAND
1291
1292static const struct edac_device_prv_data a10_nandecc_data = {
1293 .setup = altr_check_ecc_deps,
1294 .ce_clear_mask = ALTR_A10_ECC_SERRPENA,
1295 .ue_clear_mask = ALTR_A10_ECC_DERRPENA,
1296 .dbgfs_name = "altr_trigger",
1297 .ecc_enable_mask = ALTR_A10_COMMON_ECC_EN_CTL,
1298 .ecc_en_ofst = ALTR_A10_ECC_CTRL_OFST,
1299 .ce_set_mask = ALTR_A10_ECC_TSERRA,
1300 .ue_set_mask = ALTR_A10_ECC_TDERRA,
1301 .set_err_ofst = ALTR_A10_ECC_INTTEST_OFST,
1302 .ecc_irq_handler = altr_edac_a10_ecc_irq,
1303 .inject_fops = &altr_edac_a10_device_inject_fops,
1304};
1305
1306static int __init socfpga_init_nand_ecc(void)
1307{
1308 return altr_init_a10_ecc_device_type("altr,socfpga-nand-ecc");
1309}
1310
1311early_initcall(socfpga_init_nand_ecc);
1312
1313#endif /* CONFIG_EDAC_ALTERA_NAND */
1314
1288/********************* Arria10 EDAC Device Functions *************************/
1289static const struct of_device_id altr_edac_a10_device_of_match[] = {
1290#ifdef CONFIG_EDAC_ALTERA_L2C
1291 { .compatible = "altr,socfpga-a10-l2-ecc", .data = &a10_l2ecc_data },
1292#endif
1293#ifdef CONFIG_EDAC_ALTERA_OCRAM
1294 { .compatible = "altr,socfpga-a10-ocram-ecc",
1295 .data = &a10_ocramecc_data },
1296#endif
1297#ifdef CONFIG_EDAC_ALTERA_ETHERNET
1298 { .compatible = "altr,socfpga-eth-mac-ecc",
1299 .data = &a10_enetecc_data },
1300#endif
1315/********************* Arria10 EDAC Device Functions *************************/
1316static const struct of_device_id altr_edac_a10_device_of_match[] = {
1317#ifdef CONFIG_EDAC_ALTERA_L2C
1318 { .compatible = "altr,socfpga-a10-l2-ecc", .data = &a10_l2ecc_data },
1319#endif
1320#ifdef CONFIG_EDAC_ALTERA_OCRAM
1321 { .compatible = "altr,socfpga-a10-ocram-ecc",
1322 .data = &a10_ocramecc_data },
1323#endif
1324#ifdef CONFIG_EDAC_ALTERA_ETHERNET
1325 { .compatible = "altr,socfpga-eth-mac-ecc",
1326 .data = &a10_enetecc_data },
1327#endif
1328#ifdef CONFIG_EDAC_ALTERA_NAND
1329 { .compatible = "altr,socfpga-nand-ecc", .data = &a10_nandecc_data },
1330#endif
1301 {},
1302};
1303MODULE_DEVICE_TABLE(of, altr_edac_a10_device_of_match);
1304
1305/*
1306 * The Arria10 EDAC Device Functions differ from the Cyclone5/Arria5
1307 * because 2 IRQs are shared among the all ECC peripherals. The ECC
1308 * manager manages the IRQs and the children.

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1579 }
1580 irq_set_chained_handler_and_data(edac->db_irq,
1581 altr_edac_a10_irq_handler,
1582 edac);
1583
1584 for_each_child_of_node(pdev->dev.of_node, child) {
1585 if (!of_device_is_available(child))
1586 continue;
1331 {},
1332};
1333MODULE_DEVICE_TABLE(of, altr_edac_a10_device_of_match);
1334
1335/*
1336 * The Arria10 EDAC Device Functions differ from the Cyclone5/Arria5
1337 * because 2 IRQs are shared among the all ECC peripherals. The ECC
1338 * manager manages the IRQs and the children.

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1609 }
1610 irq_set_chained_handler_and_data(edac->db_irq,
1611 altr_edac_a10_irq_handler,
1612 edac);
1613
1614 for_each_child_of_node(pdev->dev.of_node, child) {
1615 if (!of_device_is_available(child))
1616 continue;
1587 if (of_device_is_compatible(child, "altr,socfpga-a10-l2-ecc"))
1617
1618 if (of_device_is_compatible(child, "altr,socfpga-a10-l2-ecc") ||
1619 of_device_is_compatible(child, "altr,socfpga-a10-ocram-ecc") ||
1620 of_device_is_compatible(child, "altr,socfpga-eth-mac-ecc") ||
1621 of_device_is_compatible(child, "altr,socfpga-nand-ecc"))
1622
1588 altr_edac_a10_device_add(edac, child);
1623 altr_edac_a10_device_add(edac, child);
1589 else if ((of_device_is_compatible(child,
1590 "altr,socfpga-a10-ocram-ecc")) ||
1591 (of_device_is_compatible(child,
1592 "altr,socfpga-eth-mac-ecc")))
1593 altr_edac_a10_device_add(edac, child);
1594 else if (of_device_is_compatible(child,
1595 "altr,sdram-edac-a10"))
1624
1625 else if (of_device_is_compatible(child, "altr,sdram-edac-a10"))
1596 of_platform_populate(pdev->dev.of_node,
1597 altr_sdram_ctrl_of_match,
1598 NULL, &pdev->dev);
1599 }
1600
1601 return 0;
1602}
1603

--- 18 unchanged lines hidden --- 		1626 of_platform_populate(pdev->dev.of_node,
1627 altr_sdram_ctrl_of_match,
1628 NULL, &pdev->dev);
1629 }
1630
1631 return 0;
1632}
1633

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