altera_edac.c (c609581d1f75e6965db8258015f5ae357df477c8) altera_edac.c (485fe9e24e53fbeef7594e90eed1e09e23b9c184)
1/*
2 * Copyright Altera Corporation (C) 2014-2016. All rights reserved.
3 * Copyright 2011-2012 Calxeda, Inc.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *

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1361{
1362 return altr_init_a10_ecc_device_type("altr,socfpga-usb-ecc");
1363}
1364
1365early_initcall(socfpga_init_usb_ecc);
1366
1367#endif /* CONFIG_EDAC_ALTERA_USB */
1368
1/*
2 * Copyright Altera Corporation (C) 2014-2016. All rights reserved.
3 * Copyright 2011-2012 Calxeda, Inc.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *

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1361{
1362 return altr_init_a10_ecc_device_type("altr,socfpga-usb-ecc");
1363}
1364
1365early_initcall(socfpga_init_usb_ecc);
1366
1367#endif /* CONFIG_EDAC_ALTERA_USB */
1368
1369/********************** QSPI Device Functions **********************/
1370
1371#ifdef CONFIG_EDAC_ALTERA_QSPI
1372
1373static const struct edac_device_prv_data a10_qspiecc_data = {
1374 .setup = altr_check_ecc_deps,
1375 .ce_clear_mask = ALTR_A10_ECC_SERRPENA,
1376 .ue_clear_mask = ALTR_A10_ECC_DERRPENA,
1377 .dbgfs_name = "altr_trigger",
1378 .ecc_enable_mask = ALTR_A10_COMMON_ECC_EN_CTL,
1379 .ecc_en_ofst = ALTR_A10_ECC_CTRL_OFST,
1380 .ce_set_mask = ALTR_A10_ECC_TSERRA,
1381 .ue_set_mask = ALTR_A10_ECC_TDERRA,
1382 .set_err_ofst = ALTR_A10_ECC_INTTEST_OFST,
1383 .ecc_irq_handler = altr_edac_a10_ecc_irq,
1384 .inject_fops = &altr_edac_a10_device_inject_fops,
1385};
1386
1387static int __init socfpga_init_qspi_ecc(void)
1388{
1389 return altr_init_a10_ecc_device_type("altr,socfpga-qspi-ecc");
1390}
1391
1392early_initcall(socfpga_init_qspi_ecc);
1393
1394#endif /* CONFIG_EDAC_ALTERA_QSPI */
1395
1369/********************* Arria10 EDAC Device Functions *************************/
1370static const struct of_device_id altr_edac_a10_device_of_match[] = {
1371#ifdef CONFIG_EDAC_ALTERA_L2C
1372 { .compatible = "altr,socfpga-a10-l2-ecc", .data = &a10_l2ecc_data },
1373#endif
1374#ifdef CONFIG_EDAC_ALTERA_OCRAM
1375 { .compatible = "altr,socfpga-a10-ocram-ecc",
1376 .data = &a10_ocramecc_data },

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1383 { .compatible = "altr,socfpga-nand-ecc", .data = &a10_nandecc_data },
1384#endif
1385#ifdef CONFIG_EDAC_ALTERA_DMA
1386 { .compatible = "altr,socfpga-dma-ecc", .data = &a10_dmaecc_data },
1387#endif
1388#ifdef CONFIG_EDAC_ALTERA_USB
1389 { .compatible = "altr,socfpga-usb-ecc", .data = &a10_usbecc_data },
1390#endif
1396/********************* Arria10 EDAC Device Functions *************************/
1397static const struct of_device_id altr_edac_a10_device_of_match[] = {
1398#ifdef CONFIG_EDAC_ALTERA_L2C
1399 { .compatible = "altr,socfpga-a10-l2-ecc", .data = &a10_l2ecc_data },
1400#endif
1401#ifdef CONFIG_EDAC_ALTERA_OCRAM
1402 { .compatible = "altr,socfpga-a10-ocram-ecc",
1403 .data = &a10_ocramecc_data },

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1410 { .compatible = "altr,socfpga-nand-ecc", .data = &a10_nandecc_data },
1411#endif
1412#ifdef CONFIG_EDAC_ALTERA_DMA
1413 { .compatible = "altr,socfpga-dma-ecc", .data = &a10_dmaecc_data },
1414#endif
1415#ifdef CONFIG_EDAC_ALTERA_USB
1416 { .compatible = "altr,socfpga-usb-ecc", .data = &a10_usbecc_data },
1417#endif
1418#ifdef CONFIG_EDAC_ALTERA_QSPI
1419 { .compatible = "altr,socfpga-qspi-ecc", .data = &a10_qspiecc_data },
1420#endif
1391 {},
1392};
1393MODULE_DEVICE_TABLE(of, altr_edac_a10_device_of_match);
1394
1395/*
1396 * The Arria10 EDAC Device Functions differ from the Cyclone5/Arria5
1397 * because 2 IRQs are shared among the all ECC peripherals. The ECC
1398 * manager manages the IRQs and the children.

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1675 if (!of_device_is_available(child))
1676 continue;
1677
1678 if (of_device_is_compatible(child, "altr,socfpga-a10-l2-ecc") ||
1679 of_device_is_compatible(child, "altr,socfpga-a10-ocram-ecc") ||
1680 of_device_is_compatible(child, "altr,socfpga-eth-mac-ecc") ||
1681 of_device_is_compatible(child, "altr,socfpga-nand-ecc") ||
1682 of_device_is_compatible(child, "altr,socfpga-dma-ecc") ||
1421 {},
1422};
1423MODULE_DEVICE_TABLE(of, altr_edac_a10_device_of_match);
1424
1425/*
1426 * The Arria10 EDAC Device Functions differ from the Cyclone5/Arria5
1427 * because 2 IRQs are shared among the all ECC peripherals. The ECC
1428 * manager manages the IRQs and the children.

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1705 if (!of_device_is_available(child))
1706 continue;
1707
1708 if (of_device_is_compatible(child, "altr,socfpga-a10-l2-ecc") ||
1709 of_device_is_compatible(child, "altr,socfpga-a10-ocram-ecc") ||
1710 of_device_is_compatible(child, "altr,socfpga-eth-mac-ecc") ||
1711 of_device_is_compatible(child, "altr,socfpga-nand-ecc") ||
1712 of_device_is_compatible(child, "altr,socfpga-dma-ecc") ||
1683 of_device_is_compatible(child, "altr,socfpga-usb-ecc"))
1713 of_device_is_compatible(child, "altr,socfpga-usb-ecc") ||
1714 of_device_is_compatible(child, "altr,socfpga-qspi-ecc"))
1684
1685 altr_edac_a10_device_add(edac, child);
1686
1687 else if (of_device_is_compatible(child, "altr,sdram-edac-a10"))
1688 of_platform_populate(pdev->dev.of_node,
1689 altr_sdram_ctrl_of_match,
1690 NULL, &pdev->dev);
1691 }

--- 22 unchanged lines hidden --- 		1715
1716 altr_edac_a10_device_add(edac, child);
1717
1718 else if (of_device_is_compatible(child, "altr,sdram-edac-a10"))
1719 of_platform_populate(pdev->dev.of_node,
1720 altr_sdram_ctrl_of_match,
1721 NULL, &pdev->dev);
1722 }

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