init.c (1b11b4ef6bd68591dcaf8423c7d05e794e6aec6f) init.c (f0dc9fda2e0ee9e01496c2f5aca3a831131fad79)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Intel I/OAT DMA Linux driver
4 * Copyright(c) 2004 - 2015 Intel Corporation.
5 */
6
7#include <linux/init.h>
8#include <linux/module.h>

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529err_self_test:
530 ioat_disable_interrupts(ioat_dma);
531err_setup_interrupts:
532 dma_pool_destroy(ioat_dma->completion_pool);
533err_out:
534 return err;
535}
536
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Intel I/OAT DMA Linux driver
4 * Copyright(c) 2004 - 2015 Intel Corporation.
5 */
6
7#include <linux/init.h>
8#include <linux/module.h>

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529err_self_test:
530 ioat_disable_interrupts(ioat_dma);
531err_setup_interrupts:
532 dma_pool_destroy(ioat_dma->completion_pool);
533err_out:
534 return err;
535}
536
537static int ioat_register(struct ioatdma_device *ioat_dma)
538{
539 int err = dma_async_device_register(&ioat_dma->dma_dev);
540
541 if (err) {
542 ioat_disable_interrupts(ioat_dma);
543 dma_pool_destroy(ioat_dma->completion_pool);
544 }
545
546 return err;
547}
548
549static void ioat_dma_remove(struct ioatdma_device *ioat_dma)
550{
551 struct dma_device *dma = &ioat_dma->dma_dev;
552
553 ioat_disable_interrupts(ioat_dma);
554
555 ioat_kobject_del(ioat_dma);
556

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1176 return err;
1177
1178 list_for_each_entry(c, &dma->channels, device_node) {
1179 ioat_chan = to_ioat_chan(c);
1180 writel(IOAT_DMA_DCA_ANY_CPU,
1181 ioat_chan->reg_base + IOAT_DCACTRL_OFFSET);
1182 }
1183
537static void ioat_dma_remove(struct ioatdma_device *ioat_dma)
538{
539 struct dma_device *dma = &ioat_dma->dma_dev;
540
541 ioat_disable_interrupts(ioat_dma);
542
543 ioat_kobject_del(ioat_dma);
544

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1164 return err;
1165
1166 list_for_each_entry(c, &dma->channels, device_node) {
1167 ioat_chan = to_ioat_chan(c);
1168 writel(IOAT_DMA_DCA_ANY_CPU,
1169 ioat_chan->reg_base + IOAT_DCACTRL_OFFSET);
1170 }
1171
1184 err = ioat_register(ioat_dma);
1172 err = dma_async_device_register(&ioat_dma->dma_dev);
1185 if (err)
1173 if (err)
1186 return err;
1174 goto err_disable_interrupts;
1187
1188 ioat_kobject_add(ioat_dma, &ioat_ktype);
1189
1190 if (dca)
1191 ioat_dma->dca = ioat_dca_init(pdev, ioat_dma->reg_base);
1192
1193 /* disable relaxed ordering */
1194 err = pcie_capability_read_word(pdev, PCI_EXP_DEVCTL, &val16);
1175
1176 ioat_kobject_add(ioat_dma, &ioat_ktype);
1177
1178 if (dca)
1179 ioat_dma->dca = ioat_dca_init(pdev, ioat_dma->reg_base);
1180
1181 /* disable relaxed ordering */
1182 err = pcie_capability_read_word(pdev, PCI_EXP_DEVCTL, &val16);
1195 if (err)
1196 return pcibios_err_to_errno(err);
1183 if (err) {
1184 err = pcibios_err_to_errno(err);
1185 goto err_disable_interrupts;
1186 }
1197
1198 /* clear relaxed ordering enable */
1199 val16 &= ~PCI_EXP_DEVCTL_RELAX_EN;
1200 err = pcie_capability_write_word(pdev, PCI_EXP_DEVCTL, val16);
1187
1188 /* clear relaxed ordering enable */
1189 val16 &= ~PCI_EXP_DEVCTL_RELAX_EN;
1190 err = pcie_capability_write_word(pdev, PCI_EXP_DEVCTL, val16);
1201 if (err)
1202 return pcibios_err_to_errno(err);
1191 if (err) {
1192 err = pcibios_err_to_errno(err);
1193 goto err_disable_interrupts;
1194 }
1203
1204 if (ioat_dma->cap & IOAT_CAP_DPS)
1205 writeb(ioat_pending_level + 1,
1206 ioat_dma->reg_base + IOAT_PREFETCH_LIMIT_OFFSET);
1207
1208 return 0;
1195
1196 if (ioat_dma->cap & IOAT_CAP_DPS)
1197 writeb(ioat_pending_level + 1,
1198 ioat_dma->reg_base + IOAT_PREFETCH_LIMIT_OFFSET);
1199
1200 return 0;
1201
1202err_disable_interrupts:
1203 ioat_disable_interrupts(ioat_dma);
1204 dma_pool_destroy(ioat_dma->completion_pool);
1205 return err;
1209}
1210
1211static void ioat_shutdown(struct pci_dev *pdev)
1212{
1213 struct ioatdma_device *ioat_dma = pci_get_drvdata(pdev);
1214 struct ioatdma_chan *ioat_chan;
1215 int i;
1216

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1207
1208static void ioat_shutdown(struct pci_dev *pdev)
1209{
1210 struct ioatdma_device *ioat_dma = pci_get_drvdata(pdev);
1211 struct ioatdma_chan *ioat_chan;
1212 int i;
1213

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