registers.h (bfe1d56091c1a404b3d4ce7e9809d745fc4453bb) registers.h (c52ca478233c172b2d322b5241d6279a8661cbba)
1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright(c) 2019 Intel Corporation. All rights rsvd. */
3#ifndef _IDXD_REGISTERS_H_
4#define _IDXD_REGISTERS_H_
5
6/* PCI Config */
7#define PCI_DEVICE_ID_INTEL_DSA_SPR0 0x0b25
8
9#define IDXD_MMIO_BAR 0
10#define IDXD_WQ_BAR 2
1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright(c) 2019 Intel Corporation. All rights rsvd. */
3#ifndef _IDXD_REGISTERS_H_
4#define _IDXD_REGISTERS_H_
5
6/* PCI Config */
7#define PCI_DEVICE_ID_INTEL_DSA_SPR0 0x0b25
8
9#define IDXD_MMIO_BAR 0
10#define IDXD_WQ_BAR 2
11#define IDXD_PORTAL_SIZE 0x4000
11
12/* MMIO Device BAR0 Registers */
13#define IDXD_VER_OFFSET 0x00
14#define IDXD_VER_MAJOR_MASK 0xf0
15#define IDXD_VER_MINOR_MASK 0x0f
16#define GET_IDXD_VER_MAJOR(x) (((x) & IDXD_VER_MAJOR_MASK) >> 4)
17#define GET_IDXD_VER_MINOR(x) ((x) & IDXD_VER_MINOR_MASK)
18

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218 /* disable WQ, drain WQ, abort WQ, reset WQ */
219 IDXD_CMDSTS_ERR_DEV_NOT_EN,
220 /* request interrupt handle */
221 IDXD_CMDSTS_ERR_INVAL_INT_IDX = 0x41,
222 IDXD_CMDSTS_ERR_NO_HANDLE,
223};
224
225#define IDXD_SWERR_OFFSET 0xc0
12
13/* MMIO Device BAR0 Registers */
14#define IDXD_VER_OFFSET 0x00
15#define IDXD_VER_MAJOR_MASK 0xf0
16#define IDXD_VER_MINOR_MASK 0x0f
17#define GET_IDXD_VER_MAJOR(x) (((x) & IDXD_VER_MAJOR_MASK) >> 4)
18#define GET_IDXD_VER_MINOR(x) ((x) & IDXD_VER_MINOR_MASK)
19

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219 /* disable WQ, drain WQ, abort WQ, reset WQ */
220 IDXD_CMDSTS_ERR_DEV_NOT_EN,
221 /* request interrupt handle */
222 IDXD_CMDSTS_ERR_INVAL_INT_IDX = 0x41,
223 IDXD_CMDSTS_ERR_NO_HANDLE,
224};
225
226#define IDXD_SWERR_OFFSET 0xc0
226#define IDXD_SWERR_VALID 0x00000001
227#define IDXD_SWERR_VALID 0x00000001
227#define IDXD_SWERR_OVERFLOW 0x00000002
228#define IDXD_SWERR_ACK (IDXD_SWERR_VALID | IDXD_SWERR_OVERFLOW)
229union sw_err_reg {
230 struct {
231 u64 valid:1;
232 u64 overflow:1;
233 u64 desc_valid:1;
234 u64 wq_idx_valid:1;

--- 101 unchanged lines hidden --- 		228#define IDXD_SWERR_OVERFLOW 0x00000002
229#define IDXD_SWERR_ACK (IDXD_SWERR_VALID | IDXD_SWERR_OVERFLOW)
230union sw_err_reg {
231 struct {
232 u64 valid:1;
233 u64 overflow:1;
234 u64 desc_valid:1;
235 u64 wq_idx_valid:1;

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