device.c (d7aad5550eca50370e3a1471b46281d03af0699e) device.c (e7184b159dd37f4be8ff3d070c7c11f76b5bc3fe)
1// SPDX-License-Identifier: GPL-2.0
2/* Copyright(c) 2019 Intel Corporation. All rights rsvd. */
3#include <linux/init.h>
4#include <linux/kernel.h>
5#include <linux/module.h>
6#include <linux/pci.h>
7#include <linux/io-64-nonatomic-lo-hi.h>
8#include <linux/dmaengine.h>

--- 516 unchanged lines hidden (view full) ---

525 /* byte 8-11 */
526 wq->wqcfg.priv = !!(wq->type == IDXD_WQT_KERNEL);
527 wq->wqcfg.mode = 1;
528
529 wq->wqcfg.priority = wq->priority;
530
531 /* bytes 12-15 */
532 wq->wqcfg.max_xfer_shift = ilog2(wq->max_xfer_bytes);
1// SPDX-License-Identifier: GPL-2.0
2/* Copyright(c) 2019 Intel Corporation. All rights rsvd. */
3#include <linux/init.h>
4#include <linux/kernel.h>
5#include <linux/module.h>
6#include <linux/pci.h>
7#include <linux/io-64-nonatomic-lo-hi.h>
8#include <linux/dmaengine.h>

--- 516 unchanged lines hidden (view full) ---

525 /* byte 8-11 */
526 wq->wqcfg.priv = !!(wq->type == IDXD_WQT_KERNEL);
527 wq->wqcfg.mode = 1;
528
529 wq->wqcfg.priority = wq->priority;
530
531 /* bytes 12-15 */
532 wq->wqcfg.max_xfer_shift = ilog2(wq->max_xfer_bytes);
533 wq->wqcfg.max_batch_shift = idxd->hw.gen_cap.max_batch_shift;
533 wq->wqcfg.max_batch_shift = ilog2(wq->max_batch_size);
534
535 dev_dbg(dev, "WQ %d CFGs\n", wq->id);
536 for (i = 0; i < 8; i++) {
537 wq_offset = idxd->wqcfg_offset + wq->id * 32 + i * sizeof(u32);
538 iowrite32(wq->wqcfg.bits[i], idxd->reg_base + wq_offset);
539 dev_dbg(dev, "WQ[%d][%d][%#x]: %#x\n",
540 wq->id, i, wq_offset,
541 ioread32(idxd->reg_base + wq_offset));

--- 136 unchanged lines hidden ---
534
535 dev_dbg(dev, "WQ %d CFGs\n", wq->id);
536 for (i = 0; i < 8; i++) {
537 wq_offset = idxd->wqcfg_offset + wq->id * 32 + i * sizeof(u32);
538 iowrite32(wq->wqcfg.bits[i], idxd->reg_base + wq_offset);
539 dev_dbg(dev, "WQ[%d][%d][%#x]: %#x\n",
540 wq->id, i, wq_offset,
541 ioread32(idxd->reg_base + wq_offset));

--- 136 unchanged lines hidden ---