device.c (9d4d8572a539ef807e21c196f145aa365fd52f0e) device.c (89e3becd8f821e507052e012d2559dcda59f538e)
1// SPDX-License-Identifier: GPL-2.0
2/* Copyright(c) 2019 Intel Corporation. All rights rsvd. */
3#include <linux/init.h>
4#include <linux/kernel.h>
5#include <linux/module.h>
6#include <linux/pci.h>
7#include <linux/io-64-nonatomic-lo-hi.h>
8#include <linux/dmaengine.h>

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393
394 gensts.bits = ioread32(idxd->reg_base + IDXD_GENSTATS_OFFSET);
395
396 if (gensts.state == IDXD_DEVICE_STATE_ENABLED)
397 return true;
398 return false;
399}
400
1// SPDX-License-Identifier: GPL-2.0
2/* Copyright(c) 2019 Intel Corporation. All rights rsvd. */
3#include <linux/init.h>
4#include <linux/kernel.h>
5#include <linux/module.h>
6#include <linux/pci.h>
7#include <linux/io-64-nonatomic-lo-hi.h>
8#include <linux/dmaengine.h>

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393
394 gensts.bits = ioread32(idxd->reg_base + IDXD_GENSTATS_OFFSET);
395
396 if (gensts.state == IDXD_DEVICE_STATE_ENABLED)
397 return true;
398 return false;
399}
400
401static inline bool idxd_device_is_halted(struct idxd_device *idxd)
402{
403 union gensts_reg gensts;
404
405 gensts.bits = ioread32(idxd->reg_base + IDXD_GENSTATS_OFFSET);
406
407 return (gensts.state == IDXD_DEVICE_STATE_HALT);
408}
409
401/*
402 * This is function is only used for reset during probe and will
403 * poll for completion. Once the device is setup with interrupts,
404 * all commands will be done via interrupt completion.
405 */
410/*
411 * This is function is only used for reset during probe and will
412 * poll for completion. Once the device is setup with interrupts,
413 * all commands will be done via interrupt completion.
414 */
406void idxd_device_init_reset(struct idxd_device *idxd)
415int idxd_device_init_reset(struct idxd_device *idxd)
407{
408 struct device *dev = &idxd->pdev->dev;
409 union idxd_command_reg cmd;
410 unsigned long flags;
411
416{
417 struct device *dev = &idxd->pdev->dev;
418 union idxd_command_reg cmd;
419 unsigned long flags;
420
421 if (idxd_device_is_halted(idxd)) {
422 dev_warn(&idxd->pdev->dev, "Device is HALTED!\n");
423 return -ENXIO;
424 }
425
412 memset(&cmd, 0, sizeof(cmd));
413 cmd.cmd = IDXD_CMD_RESET_DEVICE;
414 dev_dbg(dev, "%s: sending reset for init.\n", __func__);
415 spin_lock_irqsave(&idxd->dev_lock, flags);
416 iowrite32(cmd.bits, idxd->reg_base + IDXD_CMD_OFFSET);
417
418 while (ioread32(idxd->reg_base + IDXD_CMDSTS_OFFSET) &
419 IDXD_CMDSTS_ACTIVE)
420 cpu_relax();
421 spin_unlock_irqrestore(&idxd->dev_lock, flags);
426 memset(&cmd, 0, sizeof(cmd));
427 cmd.cmd = IDXD_CMD_RESET_DEVICE;
428 dev_dbg(dev, "%s: sending reset for init.\n", __func__);
429 spin_lock_irqsave(&idxd->dev_lock, flags);
430 iowrite32(cmd.bits, idxd->reg_base + IDXD_CMD_OFFSET);
431
432 while (ioread32(idxd->reg_base + IDXD_CMDSTS_OFFSET) &
433 IDXD_CMDSTS_ACTIVE)
434 cpu_relax();
435 spin_unlock_irqrestore(&idxd->dev_lock, flags);
436 return 0;
422}
423
424static void idxd_cmd_exec(struct idxd_device *idxd, int cmd_code, u32 operand,
425 u32 *status)
426{
427 union idxd_command_reg cmd;
428 DECLARE_COMPLETION_ONSTACK(done);
429 unsigned long flags;
430
437}
438
439static void idxd_cmd_exec(struct idxd_device *idxd, int cmd_code, u32 operand,
440 u32 *status)
441{
442 union idxd_command_reg cmd;
443 DECLARE_COMPLETION_ONSTACK(done);
444 unsigned long flags;
445
446 if (idxd_device_is_halted(idxd)) {
447 dev_warn(&idxd->pdev->dev, "Device is HALTED!\n");
448 *status = IDXD_CMDSTS_HW_ERR;
449 return;
450 }
451
431 memset(&cmd, 0, sizeof(cmd));
432 cmd.cmd = cmd_code;
433 cmd.operand = operand;
434 cmd.int_req = 1;
435
436 spin_lock_irqsave(&idxd->dev_lock, flags);
437 wait_event_lock_irq(idxd->cmd_waitq,
438 !test_bit(IDXD_FLAG_CMD_RUNNING, &idxd->flags),

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452 memset(&cmd, 0, sizeof(cmd));
453 cmd.cmd = cmd_code;
454 cmd.operand = operand;
455 cmd.int_req = 1;
456
457 spin_lock_irqsave(&idxd->dev_lock, flags);
458 wait_event_lock_irq(idxd->cmd_waitq,
459 !test_bit(IDXD_FLAG_CMD_RUNNING, &idxd->flags),

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