| regs.h (c25141062a82ae8bddced1b3ce2b57a1c0efabe0) | regs.h (7b0c03ecc42fb223baf015877fee9d517c2c8af1) |
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| 1/* 2 * Driver for the Synopsys DesignWare AHB DMA Controller 3 * 4 * Copyright (C) 2005-2007 Atmel Corporation 5 * Copyright (C) 2010-2011 ST Microelectronics 6 * Copyright (C) 2016 Intel Corporation 7 * 8 * This program is free software; you can redistribute it and/or modify --- 186 unchanged lines hidden (view full) --- 195#define DWC_CFGL_MAX_BURST(x) ((x) << 20) 196#define DWC_CFGL_RELOAD_SAR (1 << 30) 197#define DWC_CFGL_RELOAD_DAR (1 << 31) 198 199/* Bitfields in CFG_HI */ 200#define DWC_CFGH_FCMODE (1 << 0) 201#define DWC_CFGH_FIFO_MODE (1 << 1) 202#define DWC_CFGH_PROTCTL(x) ((x) << 2) | 1/* 2 * Driver for the Synopsys DesignWare AHB DMA Controller 3 * 4 * Copyright (C) 2005-2007 Atmel Corporation 5 * Copyright (C) 2010-2011 ST Microelectronics 6 * Copyright (C) 2016 Intel Corporation 7 * 8 * This program is free software; you can redistribute it and/or modify --- 186 unchanged lines hidden (view full) --- 195#define DWC_CFGL_MAX_BURST(x) ((x) << 20) 196#define DWC_CFGL_RELOAD_SAR (1 << 30) 197#define DWC_CFGL_RELOAD_DAR (1 << 31) 198 199/* Bitfields in CFG_HI */ 200#define DWC_CFGH_FCMODE (1 << 0) 201#define DWC_CFGH_FIFO_MODE (1 << 1) 202#define DWC_CFGH_PROTCTL(x) ((x) << 2) |
| 203#define DWC_CFGH_PROTCTL_DATA (0 << 2) /* data access - always set */ 204#define DWC_CFGH_PROTCTL_PRIV (1 << 2) /* privileged -> AHB HPROT[1] */ 205#define DWC_CFGH_PROTCTL_BUFFER (2 << 2) /* bufferable -> AHB HPROT[2] */ 206#define DWC_CFGH_PROTCTL_CACHE (4 << 2) /* cacheable -> AHB HPROT[3] */ |
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| 203#define DWC_CFGH_DS_UPD_EN (1 << 5) 204#define DWC_CFGH_SS_UPD_EN (1 << 6) 205#define DWC_CFGH_SRC_PER(x) ((x) << 7) 206#define DWC_CFGH_DST_PER(x) ((x) << 11) 207 208/* Bitfields in SGR */ 209#define DWC_SGR_SGI(x) ((x) << 0) 210#define DWC_SGR_SGC(x) ((x) << 20) --- 170 unchanged lines hidden --- | 207#define DWC_CFGH_DS_UPD_EN (1 << 5) 208#define DWC_CFGH_SS_UPD_EN (1 << 6) 209#define DWC_CFGH_SRC_PER(x) ((x) << 7) 210#define DWC_CFGH_DST_PER(x) ((x) << 11) 211 212/* Bitfields in SGR */ 213#define DWC_SGR_SGI(x) ((x) << 0) 214#define DWC_SGR_SGC(x) ((x) << 20) --- 170 unchanged lines hidden --- |