platform.c (0337966d121ebebf73a1c346123e8112796e684e) | platform.c (702fce05f5ad0e2af2c00d5ef41356ffdd4a3a56) |
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1/* 2 * Platform driver for the Synopsys DesignWare DMA Controller 3 * 4 * Copyright (C) 2007-2008 Atmel Corporation 5 * Copyright (C) 2010-2011 ST Microelectronics 6 * Copyright (C) 2013 Intel Corporation 7 * 8 * Some parts of this driver are derived from the original dw_dmac. --- 292 unchanged lines hidden (view full) --- 301 302 return 0; 303} 304 305static int dw_resume_early(struct device *dev) 306{ 307 struct platform_device *pdev = to_platform_device(dev); 308 struct dw_dma_chip *chip = platform_get_drvdata(pdev); | 1/* 2 * Platform driver for the Synopsys DesignWare DMA Controller 3 * 4 * Copyright (C) 2007-2008 Atmel Corporation 5 * Copyright (C) 2010-2011 ST Microelectronics 6 * Copyright (C) 2013 Intel Corporation 7 * 8 * Some parts of this driver are derived from the original dw_dmac. --- 292 unchanged lines hidden (view full) --- 301 302 return 0; 303} 304 305static int dw_resume_early(struct device *dev) 306{ 307 struct platform_device *pdev = to_platform_device(dev); 308 struct dw_dma_chip *chip = platform_get_drvdata(pdev); |
309 int ret; |
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309 | 310 |
310 clk_prepare_enable(chip->clk); | 311 ret = clk_prepare_enable(chip->clk); 312 if (ret) 313 return ret; 314 |
311 return dw_dma_enable(chip); 312} 313 314#endif /* CONFIG_PM_SLEEP */ 315 316static const struct dev_pm_ops dw_dev_pm_ops = { 317 SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_suspend_late, dw_resume_early) 318}; --- 28 unchanged lines hidden --- | 315 return dw_dma_enable(chip); 316} 317 318#endif /* CONFIG_PM_SLEEP */ 319 320static const struct dev_pm_ops dw_dev_pm_ops = { 321 SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_suspend_late, dw_resume_early) 322}; --- 28 unchanged lines hidden --- |