security.c (a072f7b7972fd85bdefefa1d6febec483438d420) security.c (2bb692f7a6cd0a7b2c29d8d5029c4469c4ec02dd)
1// SPDX-License-Identifier: GPL-2.0-only
2/* Copyright(c) 2022 Intel Corporation. All rights reserved. */
3#include <linux/libnvdimm.h>
4#include <asm/unaligned.h>
5#include <linux/module.h>
6#include <linux/async.h>
7#include <linux/slab.h>
1// SPDX-License-Identifier: GPL-2.0-only
2/* Copyright(c) 2022 Intel Corporation. All rights reserved. */
3#include <linux/libnvdimm.h>
4#include <asm/unaligned.h>
5#include <linux/module.h>
6#include <linux/async.h>
7#include <linux/slab.h>
8#include <linux/memregion.h>
8#include "cxlmem.h"
9#include "cxl.h"
10
11static unsigned long cxl_pmem_get_security_flags(struct nvdimm *nvdimm,
12 enum nvdimm_passphrase_type ptype)
13{
14 struct cxl_nvdimm *cxl_nvd = nvdimm_provider_data(nvdimm);
15 struct cxl_memdev *cxlmd = cxl_nvd->cxlmd;

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91{
92 struct cxl_nvdimm *cxl_nvd = nvdimm_provider_data(nvdimm);
93 struct cxl_memdev *cxlmd = cxl_nvd->cxlmd;
94 struct cxl_dev_state *cxlds = cxlmd->cxlds;
95
96 return cxl_mbox_send_cmd(cxlds, CXL_MBOX_OP_FREEZE_SECURITY, NULL, 0, NULL, 0);
97}
98
9#include "cxlmem.h"
10#include "cxl.h"
11
12static unsigned long cxl_pmem_get_security_flags(struct nvdimm *nvdimm,
13 enum nvdimm_passphrase_type ptype)
14{
15 struct cxl_nvdimm *cxl_nvd = nvdimm_provider_data(nvdimm);
16 struct cxl_memdev *cxlmd = cxl_nvd->cxlmd;

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92{
93 struct cxl_nvdimm *cxl_nvd = nvdimm_provider_data(nvdimm);
94 struct cxl_memdev *cxlmd = cxl_nvd->cxlmd;
95 struct cxl_dev_state *cxlds = cxlmd->cxlds;
96
97 return cxl_mbox_send_cmd(cxlds, CXL_MBOX_OP_FREEZE_SECURITY, NULL, 0, NULL, 0);
98}
99
100static int cxl_pmem_security_unlock(struct nvdimm *nvdimm,
101 const struct nvdimm_key_data *key_data)
102{
103 struct cxl_nvdimm *cxl_nvd = nvdimm_provider_data(nvdimm);
104 struct cxl_memdev *cxlmd = cxl_nvd->cxlmd;
105 struct cxl_dev_state *cxlds = cxlmd->cxlds;
106 u8 pass[NVDIMM_PASSPHRASE_LEN];
107 int rc;
108
109 if (!cpu_cache_has_invalidate_memregion())
110 return -EINVAL;
111
112 memcpy(pass, key_data->data, NVDIMM_PASSPHRASE_LEN);
113 rc = cxl_mbox_send_cmd(cxlds, CXL_MBOX_OP_UNLOCK,
114 pass, NVDIMM_PASSPHRASE_LEN, NULL, 0);
115 if (rc < 0)
116 return rc;
117
118 /* DIMM unlocked, invalidate all CPU caches before we read it */
119 cpu_cache_invalidate_memregion(IORES_DESC_PERSISTENT_MEMORY);
120 return 0;
121}
122
99static const struct nvdimm_security_ops __cxl_security_ops = {
100 .get_flags = cxl_pmem_get_security_flags,
101 .change_key = cxl_pmem_security_change_key,
102 .disable = cxl_pmem_security_disable,
103 .freeze = cxl_pmem_security_freeze,
123static const struct nvdimm_security_ops __cxl_security_ops = {
124 .get_flags = cxl_pmem_get_security_flags,
125 .change_key = cxl_pmem_security_change_key,
126 .disable = cxl_pmem_security_disable,
127 .freeze = cxl_pmem_security_freeze,
128 .unlock = cxl_pmem_security_unlock,
104};
105
106const struct nvdimm_security_ops *cxl_security_ops = &__cxl_security_ops;
129};
130
131const struct nvdimm_security_ops *cxl_security_ops = &__cxl_security_ops;
132
133MODULE_IMPORT_NS(DEVMEM);