| pci.c (08b8a8c05423174e3ef4fb0bd514de20088cf5ac) | pci.c (f29a824b0b6710328a78b018de3c2cfa9db65876) |
|---|---|
| 1// SPDX-License-Identifier: GPL-2.0-only 2/* Copyright(c) 2020 Intel Corporation. All rights reserved. */ 3#include <linux/io-64-nonatomic-lo-hi.h> 4#include <linux/moduleparam.h> 5#include <linux/module.h> 6#include <linux/delay.h> 7#include <linux/sizes.h> 8#include <linux/mutex.h> --- 853 unchanged lines hidden (view full) --- 862 rc = cxl_dev_state_identify(mds); 863 if (rc) 864 return rc; 865 866 rc = cxl_mem_create_range_info(mds); 867 if (rc) 868 return rc; 869 | 1// SPDX-License-Identifier: GPL-2.0-only 2/* Copyright(c) 2020 Intel Corporation. All rights reserved. */ 3#include <linux/io-64-nonatomic-lo-hi.h> 4#include <linux/moduleparam.h> 5#include <linux/module.h> 6#include <linux/delay.h> 7#include <linux/sizes.h> 8#include <linux/mutex.h> --- 853 unchanged lines hidden (view full) --- 862 rc = cxl_dev_state_identify(mds); 863 if (rc) 864 return rc; 865 866 rc = cxl_mem_create_range_info(mds); 867 if (rc) 868 return rc; 869 |
| 870 cxlmd = devm_cxl_add_memdev(cxlds); | 870 cxlmd = devm_cxl_add_memdev(&pdev->dev, cxlds); |
| 871 if (IS_ERR(cxlmd)) 872 return PTR_ERR(cxlmd); 873 | 871 if (IS_ERR(cxlmd)) 872 return PTR_ERR(cxlmd); 873 |
| 874 rc = cxl_memdev_setup_fw_upload(mds); | 874 rc = devm_cxl_setup_fw_upload(&pdev->dev, mds); |
| 875 if (rc) 876 return rc; 877 878 pmu_count = cxl_count_regblock(pdev, CXL_REGLOC_RBI_PMU); 879 for (i = 0; i < pmu_count; i++) { 880 struct cxl_pmu_regs pmu_regs; 881 882 rc = cxl_find_regblock_instance(pdev, CXL_REGLOC_RBI_PMU, &map, i); --- 82 unchanged lines hidden --- | 875 if (rc) 876 return rc; 877 878 pmu_count = cxl_count_regblock(pdev, CXL_REGLOC_RBI_PMU); 879 for (i = 0; i < pmu_count; i++) { 880 struct cxl_pmu_regs pmu_regs; 881 882 rc = cxl_find_regblock_instance(pdev, CXL_REGLOC_RBI_PMU, &map, i); --- 82 unchanged lines hidden --- |