region.c (11c83932028714014e4259072bd230473d6db730) region.c (c7ad3dc3649730af483ee1e78be5d0362da25bfe)
1// SPDX-License-Identifier: GPL-2.0-only
2/* Copyright(c) 2022 Intel Corporation. All rights reserved. */
3#include <linux/memregion.h>
4#include <linux/genalloc.h>
5#include <linux/device.h>
6#include <linux/module.h>
7#include <linux/slab.h>
8#include <linux/uuid.h>

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392 if (rc)
393 return rc;
394
395 rc = ways_to_eiw(val, &iw);
396 if (rc)
397 return rc;
398
399 /*
1// SPDX-License-Identifier: GPL-2.0-only
2/* Copyright(c) 2022 Intel Corporation. All rights reserved. */
3#include <linux/memregion.h>
4#include <linux/genalloc.h>
5#include <linux/device.h>
6#include <linux/module.h>
7#include <linux/slab.h>
8#include <linux/uuid.h>

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392 if (rc)
393 return rc;
394
395 rc = ways_to_eiw(val, &iw);
396 if (rc)
397 return rc;
398
399 /*
400 * Even for x3, x9, and x12 interleaves the region interleave must be a
400 * Even for x3, x6, and x12 interleaves the region interleave must be a
401 * power of 2 multiple of the host bridge interleave.
402 */
403 if (!is_power_of_2(val / cxld->interleave_ways) ||
404 (val % cxld->interleave_ways)) {
405 dev_dbg(&cxlr->dev, "invalid interleave: %d\n", val);
406 return -EINVAL;
407 }
408

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547
548 div_u64_rem(size, SZ_256M * p->interleave_ways, &remainder);
549 if (remainder)
550 return -EINVAL;
551
552 res = alloc_free_mem_region(cxlrd->res, size, SZ_256M,
553 dev_name(&cxlr->dev));
554 if (IS_ERR(res)) {
401 * power of 2 multiple of the host bridge interleave.
402 */
403 if (!is_power_of_2(val / cxld->interleave_ways) ||
404 (val % cxld->interleave_ways)) {
405 dev_dbg(&cxlr->dev, "invalid interleave: %d\n", val);
406 return -EINVAL;
407 }
408

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547
548 div_u64_rem(size, SZ_256M * p->interleave_ways, &remainder);
549 if (remainder)
550 return -EINVAL;
551
552 res = alloc_free_mem_region(cxlrd->res, size, SZ_256M,
553 dev_name(&cxlr->dev));
554 if (IS_ERR(res)) {
555 dev_dbg(&cxlr->dev,
556 "HPA allocation error (%ld) for size:%pap in %s %pr\n",
557 PTR_ERR(res), &size, cxlrd->res->name, cxlrd->res);
555 dev_dbg(&cxlr->dev, "failed to allocate HPA: %ld\n",
556 PTR_ERR(res));
558 return PTR_ERR(res);
559 }
560
561 p->res = res;
562 p->state = CXL_CONFIG_INTERLEAVE_ACTIVE;
563
564 return 0;
565}

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2079{
2080 if (dev_WARN_ONCE(dev, dev->type != &cxl_region_type,
2081 "not a cxl_region device\n"))
2082 return NULL;
2083
2084 return container_of(dev, struct cxl_region, dev);
2085}
2086
557 return PTR_ERR(res);
558 }
559
560 p->res = res;
561 p->state = CXL_CONFIG_INTERLEAVE_ACTIVE;
562
563 return 0;
564}

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2078{
2079 if (dev_WARN_ONCE(dev, dev->type != &cxl_region_type,
2080 "not a cxl_region device\n"))
2081 return NULL;
2082
2083 return container_of(dev, struct cxl_region, dev);
2084}
2085
2087static void unregister_region(void *_cxlr)
2086static void unregister_region(void *dev)
2088{
2087{
2089 struct cxl_region *cxlr = _cxlr;
2088 struct cxl_region *cxlr = to_cxl_region(dev);
2090 struct cxl_region_params *p = &cxlr->params;
2091 int i;
2092
2089 struct cxl_region_params *p = &cxlr->params;
2090 int i;
2091
2093 device_del(&cxlr->dev);
2092 device_del(dev);
2094
2095 /*
2096 * Now that region sysfs is shutdown, the parameter block is now
2097 * read-only, so no need to hold the region rwsem to access the
2098 * region parameters.
2099 */
2100 for (i = 0; i < p->interleave_ways; i++)
2101 detach_target(cxlr, i);
2102
2103 cxl_region_iomem_release(cxlr);
2093
2094 /*
2095 * Now that region sysfs is shutdown, the parameter block is now
2096 * read-only, so no need to hold the region rwsem to access the
2097 * region parameters.
2098 */
2099 for (i = 0; i < p->interleave_ways; i++)
2100 detach_target(cxlr, i);
2101
2102 cxl_region_iomem_release(cxlr);
2104 put_device(&cxlr->dev);
2103 put_device(dev);
2105}
2106
2107static struct lock_class_key cxl_region_key;
2108
2109static struct cxl_region *cxl_region_alloc(struct cxl_root_decoder *cxlrd, int id)
2110{
2111 struct cxl_region *cxlr;
2112 struct device *dev;

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2104}
2105
2106static struct lock_class_key cxl_region_key;
2107
2108static struct cxl_region *cxl_region_alloc(struct cxl_root_decoder *cxlrd, int id)
2109{
2110 struct cxl_region *cxlr;
2111 struct device *dev;

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