pci.c (98d2d3a264543680281fd8a4e6ae490ca26b4f85) pci.c (54cdbf845cf719c09b45ae588cba469aabb3159c)
1// SPDX-License-Identifier: GPL-2.0-only
2/* Copyright(c) 2021 Intel Corporation. All rights reserved. */
3#include <linux/device.h>
4#include <linux/pci.h>
5#include <cxlpci.h>
6#include <cxl.h>
7#include "core.h"
8

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42 &lnkcap))
43 return 0;
44
45 rc = cxl_find_regblock(pdev, CXL_REGLOC_RBI_COMPONENT, &map);
46 if (rc)
47 dev_dbg(&port->dev, "failed to find component registers\n");
48
49 port_num = FIELD_GET(PCI_EXP_LNKCAP_PN, lnkcap);
1// SPDX-License-Identifier: GPL-2.0-only
2/* Copyright(c) 2021 Intel Corporation. All rights reserved. */
3#include <linux/device.h>
4#include <linux/pci.h>
5#include <cxlpci.h>
6#include <cxl.h>
7#include "core.h"
8

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42 &lnkcap))
43 return 0;
44
45 rc = cxl_find_regblock(pdev, CXL_REGLOC_RBI_COMPONENT, &map);
46 if (rc)
47 dev_dbg(&port->dev, "failed to find component registers\n");
48
49 port_num = FIELD_GET(PCI_EXP_LNKCAP_PN, lnkcap);
50 cxl_device_lock(&port->dev);
51 dport = devm_cxl_add_dport(ctx->host, port, &pdev->dev, port_num,
52 cxl_regmap_to_base(pdev, &map));
50 dport = devm_cxl_add_dport(ctx->host, port, &pdev->dev, port_num,
51 cxl_regmap_to_base(pdev, &map));
53 cxl_device_unlock(&port->dev);
54 if (IS_ERR(dport)) {
55 ctx->error = PTR_ERR(dport);
56 return PTR_ERR(dport);
57 }
58 ctx->count++;
59
60 dev_dbg(&port->dev, "add dport%d: %s\n", port_num, dev_name(&pdev->dev));
61

--- 40 unchanged lines hidden --- 		52 if (IS_ERR(dport)) {
53 ctx->error = PTR_ERR(dport);
54 return PTR_ERR(dport);
55 }
56 ctx->count++;
57
58 dev_dbg(&port->dev, "add dport%d: %s\n", port_num, dev_name(&pdev->dev));
59

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