ccp-crypto.h (27988c96687667e74df1a9a3b8662519bc1c29c9) ccp-crypto.h (6273fd7a5a99549bc5b90ce8a70df88cc6b570c3)
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * AMD Cryptographic Coprocessor (CCP) crypto API support
4 *
5 * Copyright (C) 2013,2017 Advanced Micro Devices, Inc.
6 *
7 * Author: Tom Lendacky <thomas.lendacky@amd.com>
8 */

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82 return container_of(ahash_alg, struct ccp_crypto_ahash_alg, alg);
83}
84
85/***** AES related defines *****/
86struct ccp_aes_ctx {
87 /* Fallback cipher for XTS with unsupported unit sizes */
88 struct crypto_sync_skcipher *tfm_skcipher;
89
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * AMD Cryptographic Coprocessor (CCP) crypto API support
4 *
5 * Copyright (C) 2013,2017 Advanced Micro Devices, Inc.
6 *
7 * Author: Tom Lendacky <thomas.lendacky@amd.com>
8 */

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82 return container_of(ahash_alg, struct ccp_crypto_ahash_alg, alg);
83}
84
85/***** AES related defines *****/
86struct ccp_aes_ctx {
87 /* Fallback cipher for XTS with unsupported unit sizes */
88 struct crypto_sync_skcipher *tfm_skcipher;
89
90 /* Cipher used to generate CMAC K1/K2 keys */
91 struct crypto_cipher *tfm_cipher;
92
93 enum ccp_engine engine;
94 enum ccp_aes_type type;
95 enum ccp_aes_mode mode;
96
97 struct scatterlist key_sg;
98 unsigned int key_len;
99 u8 key[AES_MAX_KEY_SIZE * 2];
100

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90 enum ccp_engine engine;
91 enum ccp_aes_type type;
92 enum ccp_aes_mode mode;
93
94 struct scatterlist key_sg;
95 unsigned int key_len;
96 u8 key[AES_MAX_KEY_SIZE * 2];
97

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