regs.h (bf83490ee4207de3af59b63870eb9f72f1e523f1) regs.h (6c3af955935223217f23ef0ae672d3842418ec50)
1/*
2 * CAAM hardware register-level view
3 *
4 * Copyright 2008-2011 Freescale Semiconductor, Inc.
5 */
6
7#ifndef REGS_H
8#define REGS_H

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103#define wr_reg64(reg, data) __raw_writeq(data, reg)
104#define rd_reg64(reg) __raw_readq(reg)
105#endif
106#endif
107#endif
108
109/*
110 * The only users of these wr/rd_reg64 functions is the Job Ring (JR).
1/*
2 * CAAM hardware register-level view
3 *
4 * Copyright 2008-2011 Freescale Semiconductor, Inc.
5 */
6
7#ifndef REGS_H
8#define REGS_H

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103#define wr_reg64(reg, data) __raw_writeq(data, reg)
104#define rd_reg64(reg) __raw_readq(reg)
105#endif
106#endif
107#endif
108
109/*
110 * The only users of these wr/rd_reg64 functions is the Job Ring (JR).
111 * The DMA address registers in the JR are a pair of 32-bit registers.
112 * The layout is:
111 * The DMA address registers in the JR are handled differently depending on
112 * platform:
113 *
113 *
114 * 1. All BE CAAM platforms and i.MX platforms (LE CAAM):
115 *
114 * base + 0x0000 : most-significant 32 bits
115 * base + 0x0004 : least-significant 32 bits
116 *
117 * The 32-bit version of this core therefore has to write to base + 0x0004
116 * base + 0x0000 : most-significant 32 bits
117 * base + 0x0004 : least-significant 32 bits
118 *
119 * The 32-bit version of this core therefore has to write to base + 0x0004
118 * to set the 32-bit wide DMA address. This seems to be independent of the
119 * endianness of the written/read data.
120 * to set the 32-bit wide DMA address.
121 *
122 * 2. All other LE CAAM platforms (LS1021A etc.)
123 * base + 0x0000 : least-significant 32 bits
124 * base + 0x0004 : most-significant 32 bits
120 */
121
122#ifndef CONFIG_64BIT
125 */
126
127#ifndef CONFIG_64BIT
128#if !defined(CONFIG_CRYPTO_DEV_FSL_CAAM_LE) || \
129 defined(CONFIG_CRYPTO_DEV_FSL_CAAM_IMX)
123#define REG64_MS32(reg) ((u32 __iomem *)(reg))
124#define REG64_LS32(reg) ((u32 __iomem *)(reg) + 1)
130#define REG64_MS32(reg) ((u32 __iomem *)(reg))
131#define REG64_LS32(reg) ((u32 __iomem *)(reg) + 1)
132#else
133#define REG64_MS32(reg) ((u32 __iomem *)(reg) + 1)
134#define REG64_LS32(reg) ((u32 __iomem *)(reg))
135#endif
125
126static inline void wr_reg64(u64 __iomem *reg, u64 data)
127{
128 wr_reg32(REG64_MS32(reg), data >> 32);
129 wr_reg32(REG64_LS32(reg), data);
130}
131
132static inline u64 rd_reg64(u64 __iomem *reg)

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137static inline void wr_reg64(u64 __iomem *reg, u64 data)
138{
139 wr_reg32(REG64_MS32(reg), data >> 32);
140 wr_reg32(REG64_LS32(reg), data);
141}
142
143static inline u64 rd_reg64(u64 __iomem *reg)

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