caamhash.c (e3c55d406bd8df1a878546002c93db90c42be10c) caamhash.c (313ea293e9c4d1eabcaddd2c0800f083b03c2a2e)
1/*
2 * caam - Freescale FSL CAAM support for ahash functions of crypto API
3 *
4 * Copyright 2011 Freescale Semiconductor, Inc.
5 *
6 * Based on caamalg.c crypto API driver.
7 *
8 * relationship of digest job descriptor or first job descriptor after init to

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1675 static const u8 runninglen[] = { HASH_MSG_LEN + MD5_DIGEST_SIZE,
1676 HASH_MSG_LEN + SHA1_DIGEST_SIZE,
1677 HASH_MSG_LEN + 32,
1678 HASH_MSG_LEN + SHA256_DIGEST_SIZE,
1679 HASH_MSG_LEN + 64,
1680 HASH_MSG_LEN + SHA512_DIGEST_SIZE };
1681 int tgt_jr = atomic_inc_return(&priv->tfm_count);
1682 int ret = 0;
1/*
2 * caam - Freescale FSL CAAM support for ahash functions of crypto API
3 *
4 * Copyright 2011 Freescale Semiconductor, Inc.
5 *
6 * Based on caamalg.c crypto API driver.
7 *
8 * relationship of digest job descriptor or first job descriptor after init to

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1675 static const u8 runninglen[] = { HASH_MSG_LEN + MD5_DIGEST_SIZE,
1676 HASH_MSG_LEN + SHA1_DIGEST_SIZE,
1677 HASH_MSG_LEN + 32,
1678 HASH_MSG_LEN + SHA256_DIGEST_SIZE,
1679 HASH_MSG_LEN + 64,
1680 HASH_MSG_LEN + SHA512_DIGEST_SIZE };
1681 int tgt_jr = atomic_inc_return(&priv->tfm_count);
1682 int ret = 0;
1683 struct platform_device *pdev;
1683
1684 /*
1685 * distribute tfms across job rings to ensure in-order
1686 * crypto request processing per tfm
1687 */
1684
1685 /*
1686 * distribute tfms across job rings to ensure in-order
1687 * crypto request processing per tfm
1688 */
1688 ctx->jrdev = priv->jrdev[tgt_jr % priv->total_jobrs];
1689 pdev = priv->jrpdev[tgt_jr % priv->total_jobrs];
1690 ctx->jrdev = &pdev->dev;
1689
1690 /* copy descriptor header template value */
1691 ctx->alg_type = OP_TYPE_CLASS2_ALG | caam_hash->alg_type;
1692 ctx->alg_op = OP_TYPE_CLASS2_ALG | caam_hash->alg_op;
1693
1694 ctx->ctx_len = runninglen[(ctx->alg_op & OP_ALG_ALGSEL_SUBMASK) >>
1695 OP_ALG_ALGSEL_SHIFT];
1696

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1828 pdev = of_find_device_by_node(dev_node);
1829 if (!pdev)
1830 return -ENODEV;
1831
1832 ctrldev = &pdev->dev;
1833 priv = dev_get_drvdata(ctrldev);
1834 of_node_put(dev_node);
1835
1691
1692 /* copy descriptor header template value */
1693 ctx->alg_type = OP_TYPE_CLASS2_ALG | caam_hash->alg_type;
1694 ctx->alg_op = OP_TYPE_CLASS2_ALG | caam_hash->alg_op;
1695
1696 ctx->ctx_len = runninglen[(ctx->alg_op & OP_ALG_ALGSEL_SUBMASK) >>
1697 OP_ALG_ALGSEL_SHIFT];
1698

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1830 pdev = of_find_device_by_node(dev_node);
1831 if (!pdev)
1832 return -ENODEV;
1833
1834 ctrldev = &pdev->dev;
1835 priv = dev_get_drvdata(ctrldev);
1836 of_node_put(dev_node);
1837
1838 /*
1839 * If priv is NULL, it's probably because the caam driver wasn't
1840 * properly initialized (e.g. RNG4 init failed). Thus, bail out here.
1841 */
1842 if (!priv)
1843 return -ENODEV;
1844
1836 INIT_LIST_HEAD(&priv->hash_list);
1837
1838 atomic_set(&priv->tfm_count, -1);
1839
1840 /* register crypto algorithms the device supports */
1841 for (i = 0; i < ARRAY_SIZE(driver_hash); i++) {
1842 /* TODO: check if h/w supports alg */
1843 struct caam_hash_alg *t_alg;

--- 45 unchanged lines hidden --- 		1845 INIT_LIST_HEAD(&priv->hash_list);
1846
1847 atomic_set(&priv->tfm_count, -1);
1848
1849 /* register crypto algorithms the device supports */
1850 for (i = 0; i < ARRAY_SIZE(driver_hash); i++) {
1851 /* TODO: check if h/w supports alg */
1852 struct caam_hash_alg *t_alg;

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