caamhash.c (045e36780f11523e26d1e4a8c78bdc57f4003bd0) caamhash.c (b0e09bae37eeacb213d9baf8fcb4d48934a4ada5)
1/*
2 * caam - Freescale FSL CAAM support for ahash functions of crypto API
3 *
4 * Copyright 2011 Freescale Semiconductor, Inc.
5 *
6 * Based on caamalg.c crypto API driver.
7 *
8 * relationship of digest job descriptor or first job descriptor after init to

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1480 memcpy(state, in + sizeof(struct caam_hash_ctx),
1481 sizeof(struct caam_hash_state));
1482 return 0;
1483}
1484
1485struct caam_hash_template {
1486 char name[CRYPTO_MAX_ALG_NAME];
1487 char driver_name[CRYPTO_MAX_ALG_NAME];
1/*
2 * caam - Freescale FSL CAAM support for ahash functions of crypto API
3 *
4 * Copyright 2011 Freescale Semiconductor, Inc.
5 *
6 * Based on caamalg.c crypto API driver.
7 *
8 * relationship of digest job descriptor or first job descriptor after init to

--- 1471 unchanged lines hidden (view full) ---

1480 memcpy(state, in + sizeof(struct caam_hash_ctx),
1481 sizeof(struct caam_hash_state));
1482 return 0;
1483}
1484
1485struct caam_hash_template {
1486 char name[CRYPTO_MAX_ALG_NAME];
1487 char driver_name[CRYPTO_MAX_ALG_NAME];
1488 char hmac_name[CRYPTO_MAX_ALG_NAME];
1489 char hmac_driver_name[CRYPTO_MAX_ALG_NAME];
1488 unsigned int blocksize;
1489 struct ahash_alg template_ahash;
1490 u32 alg_type;
1491 u32 alg_op;
1492};
1493
1494/* ahash descriptors */
1495static struct caam_hash_template driver_hash[] = {
1496 {
1490 unsigned int blocksize;
1491 struct ahash_alg template_ahash;
1492 u32 alg_type;
1493 u32 alg_op;
1494};
1495
1496/* ahash descriptors */
1497static struct caam_hash_template driver_hash[] = {
1498 {
1497 .name = "hmac(sha1)",
1498 .driver_name = "hmac-sha1-caam",
1499 .name = "sha1",
1500 .driver_name = "sha1-caam",
1501 .hmac_name = "hmac(sha1)",
1502 .hmac_driver_name = "hmac-sha1-caam",
1499 .blocksize = SHA1_BLOCK_SIZE,
1500 .template_ahash = {
1501 .init = ahash_init,
1502 .update = ahash_update,
1503 .final = ahash_final,
1504 .finup = ahash_finup,
1505 .digest = ahash_digest,
1506 .export = ahash_export,
1507 .import = ahash_import,
1508 .setkey = ahash_setkey,
1509 .halg = {
1510 .digestsize = SHA1_DIGEST_SIZE,
1511 },
1512 },
1513 .alg_type = OP_ALG_ALGSEL_SHA1,
1514 .alg_op = OP_ALG_ALGSEL_SHA1 | OP_ALG_AAI_HMAC,
1515 }, {
1503 .blocksize = SHA1_BLOCK_SIZE,
1504 .template_ahash = {
1505 .init = ahash_init,
1506 .update = ahash_update,
1507 .final = ahash_final,
1508 .finup = ahash_finup,
1509 .digest = ahash_digest,
1510 .export = ahash_export,
1511 .import = ahash_import,
1512 .setkey = ahash_setkey,
1513 .halg = {
1514 .digestsize = SHA1_DIGEST_SIZE,
1515 },
1516 },
1517 .alg_type = OP_ALG_ALGSEL_SHA1,
1518 .alg_op = OP_ALG_ALGSEL_SHA1 | OP_ALG_AAI_HMAC,
1519 }, {
1516 .name = "hmac(sha224)",
1517 .driver_name = "hmac-sha224-caam",
1520 .name = "sha224",
1521 .driver_name = "sha224-caam",
1522 .hmac_name = "hmac(sha224)",
1523 .hmac_driver_name = "hmac-sha224-caam",
1518 .blocksize = SHA224_BLOCK_SIZE,
1519 .template_ahash = {
1520 .init = ahash_init,
1521 .update = ahash_update,
1522 .final = ahash_final,
1523 .finup = ahash_finup,
1524 .digest = ahash_digest,
1525 .export = ahash_export,
1526 .import = ahash_import,
1527 .setkey = ahash_setkey,
1528 .halg = {
1529 .digestsize = SHA224_DIGEST_SIZE,
1530 },
1531 },
1532 .alg_type = OP_ALG_ALGSEL_SHA224,
1533 .alg_op = OP_ALG_ALGSEL_SHA224 | OP_ALG_AAI_HMAC,
1534 }, {
1524 .blocksize = SHA224_BLOCK_SIZE,
1525 .template_ahash = {
1526 .init = ahash_init,
1527 .update = ahash_update,
1528 .final = ahash_final,
1529 .finup = ahash_finup,
1530 .digest = ahash_digest,
1531 .export = ahash_export,
1532 .import = ahash_import,
1533 .setkey = ahash_setkey,
1534 .halg = {
1535 .digestsize = SHA224_DIGEST_SIZE,
1536 },
1537 },
1538 .alg_type = OP_ALG_ALGSEL_SHA224,
1539 .alg_op = OP_ALG_ALGSEL_SHA224 | OP_ALG_AAI_HMAC,
1540 }, {
1535 .name = "hmac(sha256)",
1536 .driver_name = "hmac-sha256-caam",
1541 .name = "sha256",
1542 .driver_name = "sha256-caam",
1543 .hmac_name = "hmac(sha256)",
1544 .hmac_driver_name = "hmac-sha256-caam",
1537 .blocksize = SHA256_BLOCK_SIZE,
1538 .template_ahash = {
1539 .init = ahash_init,
1540 .update = ahash_update,
1541 .final = ahash_final,
1542 .finup = ahash_finup,
1543 .digest = ahash_digest,
1544 .export = ahash_export,
1545 .import = ahash_import,
1546 .setkey = ahash_setkey,
1547 .halg = {
1548 .digestsize = SHA256_DIGEST_SIZE,
1549 },
1550 },
1551 .alg_type = OP_ALG_ALGSEL_SHA256,
1552 .alg_op = OP_ALG_ALGSEL_SHA256 | OP_ALG_AAI_HMAC,
1553 }, {
1545 .blocksize = SHA256_BLOCK_SIZE,
1546 .template_ahash = {
1547 .init = ahash_init,
1548 .update = ahash_update,
1549 .final = ahash_final,
1550 .finup = ahash_finup,
1551 .digest = ahash_digest,
1552 .export = ahash_export,
1553 .import = ahash_import,
1554 .setkey = ahash_setkey,
1555 .halg = {
1556 .digestsize = SHA256_DIGEST_SIZE,
1557 },
1558 },
1559 .alg_type = OP_ALG_ALGSEL_SHA256,
1560 .alg_op = OP_ALG_ALGSEL_SHA256 | OP_ALG_AAI_HMAC,
1561 }, {
1554 .name = "hmac(sha384)",
1555 .driver_name = "hmac-sha384-caam",
1562 .name = "sha384",
1563 .driver_name = "sha384-caam",
1564 .hmac_name = "hmac(sha384)",
1565 .hmac_driver_name = "hmac-sha384-caam",
1556 .blocksize = SHA384_BLOCK_SIZE,
1557 .template_ahash = {
1558 .init = ahash_init,
1559 .update = ahash_update,
1560 .final = ahash_final,
1561 .finup = ahash_finup,
1562 .digest = ahash_digest,
1563 .export = ahash_export,
1564 .import = ahash_import,
1565 .setkey = ahash_setkey,
1566 .halg = {
1567 .digestsize = SHA384_DIGEST_SIZE,
1568 },
1569 },
1570 .alg_type = OP_ALG_ALGSEL_SHA384,
1571 .alg_op = OP_ALG_ALGSEL_SHA384 | OP_ALG_AAI_HMAC,
1572 }, {
1566 .blocksize = SHA384_BLOCK_SIZE,
1567 .template_ahash = {
1568 .init = ahash_init,
1569 .update = ahash_update,
1570 .final = ahash_final,
1571 .finup = ahash_finup,
1572 .digest = ahash_digest,
1573 .export = ahash_export,
1574 .import = ahash_import,
1575 .setkey = ahash_setkey,
1576 .halg = {
1577 .digestsize = SHA384_DIGEST_SIZE,
1578 },
1579 },
1580 .alg_type = OP_ALG_ALGSEL_SHA384,
1581 .alg_op = OP_ALG_ALGSEL_SHA384 | OP_ALG_AAI_HMAC,
1582 }, {
1573 .name = "hmac(sha512)",
1574 .driver_name = "hmac-sha512-caam",
1583 .name = "sha512",
1584 .driver_name = "sha512-caam",
1585 .hmac_name = "hmac(sha512)",
1586 .hmac_driver_name = "hmac-sha512-caam",
1575 .blocksize = SHA512_BLOCK_SIZE,
1576 .template_ahash = {
1577 .init = ahash_init,
1578 .update = ahash_update,
1579 .final = ahash_final,
1580 .finup = ahash_finup,
1581 .digest = ahash_digest,
1582 .export = ahash_export,
1583 .import = ahash_import,
1584 .setkey = ahash_setkey,
1585 .halg = {
1586 .digestsize = SHA512_DIGEST_SIZE,
1587 },
1588 },
1589 .alg_type = OP_ALG_ALGSEL_SHA512,
1590 .alg_op = OP_ALG_ALGSEL_SHA512 | OP_ALG_AAI_HMAC,
1591 }, {
1587 .blocksize = SHA512_BLOCK_SIZE,
1588 .template_ahash = {
1589 .init = ahash_init,
1590 .update = ahash_update,
1591 .final = ahash_final,
1592 .finup = ahash_finup,
1593 .digest = ahash_digest,
1594 .export = ahash_export,
1595 .import = ahash_import,
1596 .setkey = ahash_setkey,
1597 .halg = {
1598 .digestsize = SHA512_DIGEST_SIZE,
1599 },
1600 },
1601 .alg_type = OP_ALG_ALGSEL_SHA512,
1602 .alg_op = OP_ALG_ALGSEL_SHA512 | OP_ALG_AAI_HMAC,
1603 }, {
1592 .name = "hmac(md5)",
1593 .driver_name = "hmac-md5-caam",
1604 .name = "md5",
1605 .driver_name = "md5-caam",
1606 .hmac_name = "hmac(md5)",
1607 .hmac_driver_name = "hmac-md5-caam",
1594 .blocksize = MD5_BLOCK_WORDS * 4,
1595 .template_ahash = {
1596 .init = ahash_init,
1597 .update = ahash_update,
1598 .final = ahash_final,
1599 .finup = ahash_finup,
1600 .digest = ahash_digest,
1601 .export = ahash_export,

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1716 list_for_each_entry_safe(t_alg, n, &priv->hash_list, entry) {
1717 crypto_unregister_ahash(&t_alg->ahash_alg);
1718 list_del(&t_alg->entry);
1719 kfree(t_alg);
1720 }
1721}
1722
1723static struct caam_hash_alg *
1608 .blocksize = MD5_BLOCK_WORDS * 4,
1609 .template_ahash = {
1610 .init = ahash_init,
1611 .update = ahash_update,
1612 .final = ahash_final,
1613 .finup = ahash_finup,
1614 .digest = ahash_digest,
1615 .export = ahash_export,

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1730 list_for_each_entry_safe(t_alg, n, &priv->hash_list, entry) {
1731 crypto_unregister_ahash(&t_alg->ahash_alg);
1732 list_del(&t_alg->entry);
1733 kfree(t_alg);
1734 }
1735}
1736
1737static struct caam_hash_alg *
1724caam_hash_alloc(struct device *ctrldev, struct caam_hash_template *template)
1738caam_hash_alloc(struct device *ctrldev, struct caam_hash_template *template,
1739 bool keyed)
1725{
1726 struct caam_hash_alg *t_alg;
1727 struct ahash_alg *halg;
1728 struct crypto_alg *alg;
1729
1730 t_alg = kzalloc(sizeof(struct caam_hash_alg), GFP_KERNEL);
1731 if (!t_alg) {
1732 dev_err(ctrldev, "failed to allocate t_alg\n");
1733 return ERR_PTR(-ENOMEM);
1734 }
1735
1736 t_alg->ahash_alg = template->template_ahash;
1737 halg = &t_alg->ahash_alg;
1738 alg = &halg->halg.base;
1739
1740{
1741 struct caam_hash_alg *t_alg;
1742 struct ahash_alg *halg;
1743 struct crypto_alg *alg;
1744
1745 t_alg = kzalloc(sizeof(struct caam_hash_alg), GFP_KERNEL);
1746 if (!t_alg) {
1747 dev_err(ctrldev, "failed to allocate t_alg\n");
1748 return ERR_PTR(-ENOMEM);
1749 }
1750
1751 t_alg->ahash_alg = template->template_ahash;
1752 halg = &t_alg->ahash_alg;
1753 alg = &halg->halg.base;
1754
1740 snprintf(alg->cra_name, CRYPTO_MAX_ALG_NAME, "%s", template->name);
1741 snprintf(alg->cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s",
1742 template->driver_name);
1755 if (keyed) {
1756 snprintf(alg->cra_name, CRYPTO_MAX_ALG_NAME, "%s",
1757 template->hmac_name);
1758 snprintf(alg->cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s",
1759 template->hmac_driver_name);
1760 } else {
1761 snprintf(alg->cra_name, CRYPTO_MAX_ALG_NAME, "%s",
1762 template->name);
1763 snprintf(alg->cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s",
1764 template->driver_name);
1765 }
1743 alg->cra_module = THIS_MODULE;
1744 alg->cra_init = caam_hash_cra_init;
1745 alg->cra_exit = caam_hash_cra_exit;
1746 alg->cra_ctxsize = sizeof(struct caam_hash_ctx);
1747 alg->cra_priority = CAAM_CRA_PRIORITY;
1748 alg->cra_blocksize = template->blocksize;
1749 alg->cra_alignmask = 0;
1750 alg->cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_TYPE_AHASH;

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1781
1782 atomic_set(&priv->tfm_count, -1);
1783
1784 /* register crypto algorithms the device supports */
1785 for (i = 0; i < ARRAY_SIZE(driver_hash); i++) {
1786 /* TODO: check if h/w supports alg */
1787 struct caam_hash_alg *t_alg;
1788
1766 alg->cra_module = THIS_MODULE;
1767 alg->cra_init = caam_hash_cra_init;
1768 alg->cra_exit = caam_hash_cra_exit;
1769 alg->cra_ctxsize = sizeof(struct caam_hash_ctx);
1770 alg->cra_priority = CAAM_CRA_PRIORITY;
1771 alg->cra_blocksize = template->blocksize;
1772 alg->cra_alignmask = 0;
1773 alg->cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_TYPE_AHASH;

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1804
1805 atomic_set(&priv->tfm_count, -1);
1806
1807 /* register crypto algorithms the device supports */
1808 for (i = 0; i < ARRAY_SIZE(driver_hash); i++) {
1809 /* TODO: check if h/w supports alg */
1810 struct caam_hash_alg *t_alg;
1811
1789 t_alg = caam_hash_alloc(ctrldev, &driver_hash[i]);
1812 /* register hmac version */
1813 t_alg = caam_hash_alloc(ctrldev, &driver_hash[i], true);
1790 if (IS_ERR(t_alg)) {
1791 err = PTR_ERR(t_alg);
1792 dev_warn(ctrldev, "%s alg allocation failed\n",
1793 driver_hash[i].driver_name);
1794 continue;
1795 }
1796
1797 err = crypto_register_ahash(&t_alg->ahash_alg);
1798 if (err) {
1799 dev_warn(ctrldev, "%s alg registration failed\n",
1800 t_alg->ahash_alg.halg.base.cra_driver_name);
1801 kfree(t_alg);
1802 } else
1803 list_add_tail(&t_alg->entry, &priv->hash_list);
1814 if (IS_ERR(t_alg)) {
1815 err = PTR_ERR(t_alg);
1816 dev_warn(ctrldev, "%s alg allocation failed\n",
1817 driver_hash[i].driver_name);
1818 continue;
1819 }
1820
1821 err = crypto_register_ahash(&t_alg->ahash_alg);
1822 if (err) {
1823 dev_warn(ctrldev, "%s alg registration failed\n",
1824 t_alg->ahash_alg.halg.base.cra_driver_name);
1825 kfree(t_alg);
1826 } else
1827 list_add_tail(&t_alg->entry, &priv->hash_list);
1828
1829 /* register unkeyed version */
1830 t_alg = caam_hash_alloc(ctrldev, &driver_hash[i], false);
1831 if (IS_ERR(t_alg)) {
1832 err = PTR_ERR(t_alg);
1833 dev_warn(ctrldev, "%s alg allocation failed\n",
1834 driver_hash[i].driver_name);
1835 continue;
1836 }
1837
1838 err = crypto_register_ahash(&t_alg->ahash_alg);
1839 if (err) {
1840 dev_warn(ctrldev, "%s alg registration failed\n",
1841 t_alg->ahash_alg.halg.base.cra_driver_name);
1842 kfree(t_alg);
1843 } else
1844 list_add_tail(&t_alg->entry, &priv->hash_list);
1804 }
1805
1806 return err;
1807}
1808
1809module_init(caam_algapi_hash_init);
1810module_exit(caam_algapi_hash_exit);
1811
1812MODULE_LICENSE("GPL");
1813MODULE_DESCRIPTION("FSL CAAM support for ahash functions of crypto API");
1814MODULE_AUTHOR("Freescale Semiconductor - NMG");
1845 }
1846
1847 return err;
1848}
1849
1850module_init(caam_algapi_hash_init);
1851module_exit(caam_algapi_hash_exit);
1852
1853MODULE_LICENSE("GPL");
1854MODULE_DESCRIPTION("FSL CAAM support for ahash functions of crypto API");
1855MODULE_AUTHOR("Freescale Semiconductor - NMG");