caamalg_qi.c (a5e5c13398f353bb7ebbe913a7bb0c2a77b2ae10) caamalg_qi.c (1b46c90c8e002028dc622bf7bd8cf89efcaab274)
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Freescale FSL CAAM support for crypto API over QI backend.
4 * Based on caamalg.c
5 *
6 * Copyright 2013-2016 Freescale Semiconductor, Inc.
7 * Copyright 2016-2019 NXP
8 */

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2487 caam_exit_common(crypto_skcipher_ctx(tfm));
2488}
2489
2490static void caam_aead_exit(struct crypto_aead *tfm)
2491{
2492 caam_exit_common(crypto_aead_ctx(tfm));
2493}
2494
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Freescale FSL CAAM support for crypto API over QI backend.
4 * Based on caamalg.c
5 *
6 * Copyright 2013-2016 Freescale Semiconductor, Inc.
7 * Copyright 2016-2019 NXP
8 */

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2487 caam_exit_common(crypto_skcipher_ctx(tfm));
2488}
2489
2490static void caam_aead_exit(struct crypto_aead *tfm)
2491{
2492 caam_exit_common(crypto_aead_ctx(tfm));
2493}
2494
2495static void __exit caam_qi_algapi_exit(void)
2495void caam_qi_algapi_exit(void)
2496{
2497 int i;
2498
2499 for (i = 0; i < ARRAY_SIZE(driver_aeads); i++) {
2500 struct caam_aead_alg *t_alg = driver_aeads + i;
2501
2502 if (t_alg->registered)
2503 crypto_unregister_aead(&t_alg->aead);

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2532 alg->base.cra_priority = CAAM_CRA_PRIORITY;
2533 alg->base.cra_ctxsize = sizeof(struct caam_ctx);
2534 alg->base.cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY;
2535
2536 alg->init = caam_aead_init;
2537 alg->exit = caam_aead_exit;
2538}
2539
2496{
2497 int i;
2498
2499 for (i = 0; i < ARRAY_SIZE(driver_aeads); i++) {
2500 struct caam_aead_alg *t_alg = driver_aeads + i;
2501
2502 if (t_alg->registered)
2503 crypto_unregister_aead(&t_alg->aead);

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2532 alg->base.cra_priority = CAAM_CRA_PRIORITY;
2533 alg->base.cra_ctxsize = sizeof(struct caam_ctx);
2534 alg->base.cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY;
2535
2536 alg->init = caam_aead_init;
2537 alg->exit = caam_aead_exit;
2538}
2539
2540static int __init caam_qi_algapi_init(void)
2540int caam_qi_algapi_init(struct device *ctrldev)
2541{
2541{
2542 struct device_node *dev_node;
2543 struct platform_device *pdev;
2544 struct device *ctrldev;
2545 struct caam_drv_private *priv;
2542 struct caam_drv_private *priv = dev_get_drvdata(ctrldev);
2546 int i = 0, err = 0;
2547 u32 aes_vid, aes_inst, des_inst, md_vid, md_inst;
2548 unsigned int md_limit = SHA512_DIGEST_SIZE;
2549 bool registered = false;
2550
2543 int i = 0, err = 0;
2544 u32 aes_vid, aes_inst, des_inst, md_vid, md_inst;
2545 unsigned int md_limit = SHA512_DIGEST_SIZE;
2546 bool registered = false;
2547
2551 dev_node = of_find_compatible_node(NULL, NULL, "fsl,sec-v4.0");
2552 if (!dev_node) {
2553 dev_node = of_find_compatible_node(NULL, NULL, "fsl,sec4.0");
2554 if (!dev_node)
2555 return -ENODEV;
2556 }
2557
2558 pdev = of_find_device_by_node(dev_node);
2559 of_node_put(dev_node);
2560 if (!pdev)
2561 return -ENODEV;
2562
2563 ctrldev = &pdev->dev;
2564 priv = dev_get_drvdata(ctrldev);
2565
2566 /*
2567 * If priv is NULL, it's probably because the caam driver wasn't
2568 * properly initialized (e.g. RNG4 init failed). Thus, bail out here.
2569 */
2570 if (!priv || !priv->qi_present) {
2571 err = -ENODEV;
2572 goto out_put_dev;
2573 }
2574
2575 if (caam_dpaa2) {
2576 dev_info(ctrldev, "caam/qi frontend driver not suitable for DPAA 2.x, aborting...\n");
2548 if (caam_dpaa2) {
2549 dev_info(ctrldev, "caam/qi frontend driver not suitable for DPAA 2.x, aborting...\n");
2577 err = -ENODEV;
2578 goto out_put_dev;
2550 return -ENODEV;
2579 }
2580
2581 /*
2582 * Register crypto algorithms the device supports.
2583 * First, detect presence and attributes of DES, AES, and MD blocks.
2584 */
2585 if (priv->era < 10) {
2586 u32 cha_vid, cha_inst;

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2683
2684 t_alg->registered = true;
2685 registered = true;
2686 }
2687
2688 if (registered)
2689 dev_info(priv->qidev, "algorithms registered in /proc/crypto\n");
2690
2551 }
2552
2553 /*
2554 * Register crypto algorithms the device supports.
2555 * First, detect presence and attributes of DES, AES, and MD blocks.
2556 */
2557 if (priv->era < 10) {
2558 u32 cha_vid, cha_inst;

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2655
2656 t_alg->registered = true;
2657 registered = true;
2658 }
2659
2660 if (registered)
2661 dev_info(priv->qidev, "algorithms registered in /proc/crypto\n");
2662
2691out_put_dev:
2692 put_device(ctrldev);
2693 return err;
2694}
2663 return err;
2664}
2695
2696module_init(caam_qi_algapi_init);
2697module_exit(caam_qi_algapi_exit);
2698
2699MODULE_LICENSE("GPL");
2700MODULE_DESCRIPTION("Support for crypto API using CAAM-QI backend");
2701MODULE_AUTHOR("Freescale Semiconductor");