caamalg.c (e3c55d406bd8df1a878546002c93db90c42be10c) caamalg.c (313ea293e9c4d1eabcaddd2c0800f083b03c2a2e)
1/*
2 * caam - Freescale FSL CAAM support for crypto API
3 *
4 * Copyright 2008-2011 Freescale Semiconductor, Inc.
5 *
6 * Based on talitos crypto API driver.
7 *
8 * relationship of job descriptors to shared descriptors (SteveC Dec 10 2008):

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2066
2067static int caam_cra_init(struct crypto_tfm *tfm)
2068{
2069 struct crypto_alg *alg = tfm->__crt_alg;
2070 struct caam_crypto_alg *caam_alg =
2071 container_of(alg, struct caam_crypto_alg, crypto_alg);
2072 struct caam_ctx *ctx = crypto_tfm_ctx(tfm);
2073 struct caam_drv_private *priv = dev_get_drvdata(caam_alg->ctrldev);
1/*
2 * caam - Freescale FSL CAAM support for crypto API
3 *
4 * Copyright 2008-2011 Freescale Semiconductor, Inc.
5 *
6 * Based on talitos crypto API driver.
7 *
8 * relationship of job descriptors to shared descriptors (SteveC Dec 10 2008):

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2066
2067static int caam_cra_init(struct crypto_tfm *tfm)
2068{
2069 struct crypto_alg *alg = tfm->__crt_alg;
2070 struct caam_crypto_alg *caam_alg =
2071 container_of(alg, struct caam_crypto_alg, crypto_alg);
2072 struct caam_ctx *ctx = crypto_tfm_ctx(tfm);
2073 struct caam_drv_private *priv = dev_get_drvdata(caam_alg->ctrldev);
2074 struct platform_device *pdev;
2074 int tgt_jr = atomic_inc_return(&priv->tfm_count);
2075
2076 /*
2077 * distribute tfms across job rings to ensure in-order
2078 * crypto request processing per tfm
2079 */
2075 int tgt_jr = atomic_inc_return(&priv->tfm_count);
2076
2077 /*
2078 * distribute tfms across job rings to ensure in-order
2079 * crypto request processing per tfm
2080 */
2080 ctx->jrdev = priv->jrdev[(tgt_jr / 2) % priv->total_jobrs];
2081 pdev = priv->jrpdev[(tgt_jr / 2) % priv->total_jobrs];
2082 ctx->jrdev = &pdev->dev;
2081
2082 /* copy descriptor header template value */
2083 ctx->class1_alg_type = OP_TYPE_CLASS1_ALG | caam_alg->class1_alg_type;
2084 ctx->class2_alg_type = OP_TYPE_CLASS2_ALG | caam_alg->class2_alg_type;
2085 ctx->alg_op = OP_TYPE_CLASS2_ALG | caam_alg->alg_op;
2086
2087 return 0;
2088}

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2204 pdev = of_find_device_by_node(dev_node);
2205 if (!pdev)
2206 return -ENODEV;
2207
2208 ctrldev = &pdev->dev;
2209 priv = dev_get_drvdata(ctrldev);
2210 of_node_put(dev_node);
2211
2083
2084 /* copy descriptor header template value */
2085 ctx->class1_alg_type = OP_TYPE_CLASS1_ALG | caam_alg->class1_alg_type;
2086 ctx->class2_alg_type = OP_TYPE_CLASS2_ALG | caam_alg->class2_alg_type;
2087 ctx->alg_op = OP_TYPE_CLASS2_ALG | caam_alg->alg_op;
2088
2089 return 0;
2090}

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2206 pdev = of_find_device_by_node(dev_node);
2207 if (!pdev)
2208 return -ENODEV;
2209
2210 ctrldev = &pdev->dev;
2211 priv = dev_get_drvdata(ctrldev);
2212 of_node_put(dev_node);
2213
2214 /*
2215 * If priv is NULL, it's probably because the caam driver wasn't
2216 * properly initialized (e.g. RNG4 init failed). Thus, bail out here.
2217 */
2218 if (!priv)
2219 return -ENODEV;
2220
2212 INIT_LIST_HEAD(&priv->alg_list);
2213
2214 atomic_set(&priv->tfm_count, -1);
2215
2216 /* register crypto algorithms the device supports */
2217 for (i = 0; i < ARRAY_SIZE(driver_algs); i++) {
2218 /* TODO: check if h/w supports alg */
2219 struct caam_crypto_alg *t_alg;

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2221 INIT_LIST_HEAD(&priv->alg_list);
2222
2223 atomic_set(&priv->tfm_count, -1);
2224
2225 /* register crypto algorithms the device supports */
2226 for (i = 0; i < ARRAY_SIZE(driver_algs); i++) {
2227 /* TODO: check if h/w supports alg */
2228 struct caam_crypto_alg *t_alg;

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