| divider.c (1b09c308e64969f545f4b9474b786ad90dddf9a2) | divider.c (03aea91bbe06d4ffae8c22c9e1e6671a76fd6d5a) |
|---|---|
| 1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Zynq UltraScale+ MPSoC Divider support 4 * 5 * Copyright (C) 2016-2019 Xilinx 6 * 7 * Adjustable divider clock implementation 8 */ --- 242 unchanged lines hidden (view full) --- 251} 252 253static const struct clk_ops zynqmp_clk_divider_ops = { 254 .recalc_rate = zynqmp_clk_divider_recalc_rate, 255 .round_rate = zynqmp_clk_divider_round_rate, 256 .set_rate = zynqmp_clk_divider_set_rate, 257}; 258 | 1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Zynq UltraScale+ MPSoC Divider support 4 * 5 * Copyright (C) 2016-2019 Xilinx 6 * 7 * Adjustable divider clock implementation 8 */ --- 242 unchanged lines hidden (view full) --- 251} 252 253static const struct clk_ops zynqmp_clk_divider_ops = { 254 .recalc_rate = zynqmp_clk_divider_recalc_rate, 255 .round_rate = zynqmp_clk_divider_round_rate, 256 .set_rate = zynqmp_clk_divider_set_rate, 257}; 258 |
| 259static const struct clk_ops zynqmp_clk_divider_ro_ops = { 260 .recalc_rate = zynqmp_clk_divider_recalc_rate, 261 .round_rate = zynqmp_clk_divider_round_rate, 262}; 263 |
|
| 259/** 260 * zynqmp_clk_get_max_divisor() - Get maximum supported divisor from firmware. 261 * @clk_id: Id of clock 262 * @type: Divider type 263 * 264 * Return: Maximum divisor of a clock if query data is successful 265 * U16_MAX in case of query data is not success 266 */ --- 62 unchanged lines hidden (view full) --- 329 int ret; 330 331 /* allocate the divider */ 332 div = kzalloc(sizeof(*div), GFP_KERNEL); 333 if (!div) 334 return ERR_PTR(-ENOMEM); 335 336 init.name = name; | 264/** 265 * zynqmp_clk_get_max_divisor() - Get maximum supported divisor from firmware. 266 * @clk_id: Id of clock 267 * @type: Divider type 268 * 269 * Return: Maximum divisor of a clock if query data is successful 270 * U16_MAX in case of query data is not success 271 */ --- 62 unchanged lines hidden (view full) --- 334 int ret; 335 336 /* allocate the divider */ 337 div = kzalloc(sizeof(*div), GFP_KERNEL); 338 if (!div) 339 return ERR_PTR(-ENOMEM); 340 341 init.name = name; |
| 337 init.ops = &zynqmp_clk_divider_ops; | 342 if (nodes->type_flag & CLK_DIVIDER_READ_ONLY) 343 init.ops = &zynqmp_clk_divider_ro_ops; 344 else 345 init.ops = &zynqmp_clk_divider_ops; |
| 338 339 init.flags = zynqmp_clk_map_common_ccf_flags(nodes->flag); 340 341 init.parent_names = parents; 342 init.num_parents = 1; 343 344 /* struct clk_divider assignments */ 345 div->is_frac = !!((nodes->flag & CLK_FRAC) | --- 21 unchanged lines hidden --- | 346 347 init.flags = zynqmp_clk_map_common_ccf_flags(nodes->flag); 348 349 init.parent_names = parents; 350 init.num_parents = 1; 351 352 /* struct clk_divider assignments */ 353 div->is_frac = !!((nodes->flag & CLK_FRAC) | --- 21 unchanged lines hidden --- |