clk-44xx.c (75bf465f0bc33e9b776a46d6a1b9b990f5fb7c37) clk-44xx.c (e1799d451a872cc9b0e0a96d820fc599e2b30a44)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * OMAP4 Clock init
4 *
5 * Copyright (C) 2013 Texas Instruments, Inc.
6 *
7 * Tero Kristo (t-kristo@ti.com)
8 */

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32#define OMAP4_DPLL_USB_DEFFREQ 960000000
33
34static const struct omap_clkctrl_reg_data omap4_mpuss_clkctrl_regs[] __initconst = {
35 { OMAP4_MPU_CLKCTRL, NULL, 0, "dpll_mpu_m2_ck" },
36 { 0 },
37};
38
39static const struct omap_clkctrl_reg_data omap4_tesla_clkctrl_regs[] __initconst = {
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * OMAP4 Clock init
4 *
5 * Copyright (C) 2013 Texas Instruments, Inc.
6 *
7 * Tero Kristo (t-kristo@ti.com)
8 */

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32#define OMAP4_DPLL_USB_DEFFREQ 960000000
33
34static const struct omap_clkctrl_reg_data omap4_mpuss_clkctrl_regs[] __initconst = {
35 { OMAP4_MPU_CLKCTRL, NULL, 0, "dpll_mpu_m2_ck" },
36 { 0 },
37};
38
39static const struct omap_clkctrl_reg_data omap4_tesla_clkctrl_regs[] __initconst = {
40 { OMAP4_DSP_CLKCTRL, NULL, CLKF_HW_SUP, "dpll_iva_m4x2_ck" },
40 { OMAP4_DSP_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_NO_IDLEST, "dpll_iva_m4x2_ck" },
41 { 0 },
42};
43
44static const char * const omap4_aess_fclk_parents[] __initconst = {
45 "abe_clk",
46 NULL,
47};
48

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214static const struct omap_clkctrl_reg_data omap4_l3_2_clkctrl_regs[] __initconst = {
215 { OMAP4_L3_MAIN_2_CLKCTRL, NULL, 0, "l3_div_ck" },
216 { OMAP4_GPMC_CLKCTRL, NULL, CLKF_HW_SUP, "l3_div_ck" },
217 { OMAP4_OCMC_RAM_CLKCTRL, NULL, 0, "l3_div_ck" },
218 { 0 },
219};
220
221static const struct omap_clkctrl_reg_data omap4_ducati_clkctrl_regs[] __initconst = {
41 { 0 },
42};
43
44static const char * const omap4_aess_fclk_parents[] __initconst = {
45 "abe_clk",
46 NULL,
47};
48

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214static const struct omap_clkctrl_reg_data omap4_l3_2_clkctrl_regs[] __initconst = {
215 { OMAP4_L3_MAIN_2_CLKCTRL, NULL, 0, "l3_div_ck" },
216 { OMAP4_GPMC_CLKCTRL, NULL, CLKF_HW_SUP, "l3_div_ck" },
217 { OMAP4_OCMC_RAM_CLKCTRL, NULL, 0, "l3_div_ck" },
218 { 0 },
219};
220
221static const struct omap_clkctrl_reg_data omap4_ducati_clkctrl_regs[] __initconst = {
222 { OMAP4_IPU_CLKCTRL, NULL, CLKF_HW_SUP, "ducati_clk_mux_ck" },
222 { OMAP4_IPU_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_NO_IDLEST, "ducati_clk_mux_ck" },
223 { 0 },
224};
225
226static const struct omap_clkctrl_reg_data omap4_l3_dma_clkctrl_regs[] __initconst = {
227 { OMAP4_DMA_SYSTEM_CLKCTRL, NULL, 0, "l3_div_ck" },
228 { 0 },
229};
230

--- 582 unchanged lines hidden --- 		223 { 0 },
224};
225
226static const struct omap_clkctrl_reg_data omap4_l3_dma_clkctrl_regs[] __initconst = {
227 { OMAP4_DMA_SYSTEM_CLKCTRL, NULL, 0, "l3_div_ck" },
228 { 0 },
229};
230

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