clk-44xx.c (05909cd9a0c8811731b38697af13075e8954314f) clk-44xx.c (3614fb09f998c8f710142fb722ba216ddc79db24)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * OMAP4 Clock init
4 *
5 * Copyright (C) 2013 Texas Instruments, Inc.
6 *
7 * Tero Kristo (t-kristo@ti.com)
8 */

--- 241 unchanged lines hidden (view full) ---

250static const struct omap_clkctrl_reg_data omap4_l3_instr_clkctrl_regs[] __initconst = {
251 { OMAP4_L3_MAIN_3_CLKCTRL, NULL, CLKF_HW_SUP, "l3_div_ck" },
252 { OMAP4_L3_INSTR_CLKCTRL, NULL, CLKF_HW_SUP, "l3_div_ck" },
253 { OMAP4_OCP_WP_NOC_CLKCTRL, NULL, CLKF_HW_SUP, "l3_div_ck" },
254 { 0 },
255};
256
257static const struct omap_clkctrl_reg_data omap4_ivahd_clkctrl_regs[] __initconst = {
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * OMAP4 Clock init
4 *
5 * Copyright (C) 2013 Texas Instruments, Inc.
6 *
7 * Tero Kristo (t-kristo@ti.com)
8 */

--- 241 unchanged lines hidden (view full) ---

250static const struct omap_clkctrl_reg_data omap4_l3_instr_clkctrl_regs[] __initconst = {
251 { OMAP4_L3_MAIN_3_CLKCTRL, NULL, CLKF_HW_SUP, "l3_div_ck" },
252 { OMAP4_L3_INSTR_CLKCTRL, NULL, CLKF_HW_SUP, "l3_div_ck" },
253 { OMAP4_OCP_WP_NOC_CLKCTRL, NULL, CLKF_HW_SUP, "l3_div_ck" },
254 { 0 },
255};
256
257static const struct omap_clkctrl_reg_data omap4_ivahd_clkctrl_regs[] __initconst = {
258 { OMAP4_IVA_CLKCTRL, NULL, CLKF_HW_SUP, "dpll_iva_m5x2_ck" },
258 { OMAP4_IVA_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_NO_IDLEST, "dpll_iva_m5x2_ck" },
259 { OMAP4_SL2IF_CLKCTRL, NULL, CLKF_HW_SUP, "dpll_iva_m5x2_ck" },
260 { 0 },
261};
262
263static const char * const omap4_iss_ctrlclk_parents[] __initconst = {
264 "func_96m_fclk",
265 NULL,
266};

--- 559 unchanged lines hidden --- 		259 { OMAP4_SL2IF_CLKCTRL, NULL, CLKF_HW_SUP, "dpll_iva_m5x2_ck" },
260 { 0 },
261};
262
263static const char * const omap4_iss_ctrlclk_parents[] __initconst = {
264 "func_96m_fclk",
265 NULL,
266};

--- 559 unchanged lines hidden ---