clk-tegra210.c (ef6ed2b9562c1b2354dbbbcfeacd37ce91111502) clk-tegra210.c (bfa34832df1fffb79c1719d4016e9cacf0f83b22)
1/*
2 * Copyright (c) 2012-2014 NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT

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2217 [tegra_clk_nvjpg] = { .dt_id = TEGRA210_CLK_NVJPG, .present = true },
2218 [tegra_clk_pll_c4_out0] = { .dt_id = TEGRA210_CLK_PLL_C4_OUT0, .present = true },
2219 [tegra_clk_pll_c4_out1] = { .dt_id = TEGRA210_CLK_PLL_C4_OUT1, .present = true },
2220 [tegra_clk_pll_c4_out2] = { .dt_id = TEGRA210_CLK_PLL_C4_OUT2, .present = true },
2221 [tegra_clk_pll_c4_out3] = { .dt_id = TEGRA210_CLK_PLL_C4_OUT3, .present = true },
2222 [tegra_clk_apb2ape] = { .dt_id = TEGRA210_CLK_APB2APE, .present = true },
2223 [tegra_clk_pll_a1] = { .dt_id = TEGRA210_CLK_PLL_A1, .present = true },
2224 [tegra_clk_ispa] = { .dt_id = TEGRA210_CLK_ISPA, .present = true },
1/*
2 * Copyright (c) 2012-2014 NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT

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2217 [tegra_clk_nvjpg] = { .dt_id = TEGRA210_CLK_NVJPG, .present = true },
2218 [tegra_clk_pll_c4_out0] = { .dt_id = TEGRA210_CLK_PLL_C4_OUT0, .present = true },
2219 [tegra_clk_pll_c4_out1] = { .dt_id = TEGRA210_CLK_PLL_C4_OUT1, .present = true },
2220 [tegra_clk_pll_c4_out2] = { .dt_id = TEGRA210_CLK_PLL_C4_OUT2, .present = true },
2221 [tegra_clk_pll_c4_out3] = { .dt_id = TEGRA210_CLK_PLL_C4_OUT3, .present = true },
2222 [tegra_clk_apb2ape] = { .dt_id = TEGRA210_CLK_APB2APE, .present = true },
2223 [tegra_clk_pll_a1] = { .dt_id = TEGRA210_CLK_PLL_A1, .present = true },
2224 [tegra_clk_ispa] = { .dt_id = TEGRA210_CLK_ISPA, .present = true },
2225 [tegra_clk_cec] = { .dt_id = TEGRA210_CLK_CEC, .present = true },
2225};
2226
2227static struct tegra_devclk devclks[] __initdata = {
2228 { .con_id = "clk_m", .dt_id = TEGRA210_CLK_CLK_M },
2229 { .con_id = "pll_ref", .dt_id = TEGRA210_CLK_PLL_REF },
2230 { .con_id = "clk_32k", .dt_id = TEGRA210_CLK_CLK_32K },
2231 { .con_id = "clk_m_div2", .dt_id = TEGRA210_CLK_CLK_M_DIV2 },
2232 { .con_id = "clk_m_div4", .dt_id = TEGRA210_CLK_CLK_M_DIV4 },

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2227
2228static struct tegra_devclk devclks[] __initdata = {
2229 { .con_id = "clk_m", .dt_id = TEGRA210_CLK_CLK_M },
2230 { .con_id = "pll_ref", .dt_id = TEGRA210_CLK_PLL_REF },
2231 { .con_id = "clk_32k", .dt_id = TEGRA210_CLK_CLK_32K },
2232 { .con_id = "clk_m_div2", .dt_id = TEGRA210_CLK_CLK_M_DIV2 },
2233 { .con_id = "clk_m_div4", .dt_id = TEGRA210_CLK_CLK_M_DIV4 },

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