clk-tegra210.c (991a051ea5f15266903f52acb5832a596dd3da51) clk-tegra210.c (da8d1a3555406275650b366460c6235f1696bf8b)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2012-2014 NVIDIA CORPORATION. All rights reserved.
4 */
5
6#include <linux/io.h>
7#include <linux/clk.h>
8#include <linux/clk-provider.h>

--- 2337 unchanged lines hidden (view full) ---

2346 [tegra_clk_xusb_ss] = { .dt_id = TEGRA210_CLK_XUSB_SS, .present = true },
2347 [tegra_clk_i2c6] = { .dt_id = TEGRA210_CLK_I2C6, .present = true },
2348 [tegra_clk_vim2_clk] = { .dt_id = TEGRA210_CLK_VIM2_CLK, .present = true },
2349 [tegra_clk_clk72Mhz_8] = { .dt_id = TEGRA210_CLK_CLK72MHZ, .present = true },
2350 [tegra_clk_vic03_8] = { .dt_id = TEGRA210_CLK_VIC03, .present = true },
2351 [tegra_clk_dpaux] = { .dt_id = TEGRA210_CLK_DPAUX, .present = true },
2352 [tegra_clk_dpaux1] = { .dt_id = TEGRA210_CLK_DPAUX1, .present = true },
2353 [tegra_clk_sor0] = { .dt_id = TEGRA210_CLK_SOR0, .present = true },
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2012-2014 NVIDIA CORPORATION. All rights reserved.
4 */
5
6#include <linux/io.h>
7#include <linux/clk.h>
8#include <linux/clk-provider.h>

--- 2337 unchanged lines hidden (view full) ---

2346 [tegra_clk_xusb_ss] = { .dt_id = TEGRA210_CLK_XUSB_SS, .present = true },
2347 [tegra_clk_i2c6] = { .dt_id = TEGRA210_CLK_I2C6, .present = true },
2348 [tegra_clk_vim2_clk] = { .dt_id = TEGRA210_CLK_VIM2_CLK, .present = true },
2349 [tegra_clk_clk72Mhz_8] = { .dt_id = TEGRA210_CLK_CLK72MHZ, .present = true },
2350 [tegra_clk_vic03_8] = { .dt_id = TEGRA210_CLK_VIC03, .present = true },
2351 [tegra_clk_dpaux] = { .dt_id = TEGRA210_CLK_DPAUX, .present = true },
2352 [tegra_clk_dpaux1] = { .dt_id = TEGRA210_CLK_DPAUX1, .present = true },
2353 [tegra_clk_sor0] = { .dt_id = TEGRA210_CLK_SOR0, .present = true },
2354 [tegra_clk_sor0_lvds] = { .dt_id = TEGRA210_CLK_SOR0_LVDS, .present = true },
2354 [tegra_clk_sor0_out] = { .dt_id = TEGRA210_CLK_SOR0_OUT, .present = true },
2355 [tegra_clk_sor1] = { .dt_id = TEGRA210_CLK_SOR1, .present = true },
2356 [tegra_clk_sor1_out] = { .dt_id = TEGRA210_CLK_SOR1_OUT, .present = true },
2357 [tegra_clk_gpu] = { .dt_id = TEGRA210_CLK_GPU, .present = true },
2358 [tegra_clk_pll_g_ref] = { .dt_id = TEGRA210_CLK_PLL_G_REF, .present = true, },
2359 [tegra_clk_uartb_8] = { .dt_id = TEGRA210_CLK_UARTB, .present = true },
2360 [tegra_clk_spdif_in_8] = { .dt_id = TEGRA210_CLK_SPDIF_IN, .present = true },
2361 [tegra_clk_spdif_out] = { .dt_id = TEGRA210_CLK_SPDIF_OUT, .present = true },
2362 [tegra_clk_vi_10] = { .dt_id = TEGRA210_CLK_VI, .present = true },

--- 1228 unchanged lines hidden --- 		2355 [tegra_clk_sor1] = { .dt_id = TEGRA210_CLK_SOR1, .present = true },
2356 [tegra_clk_sor1_out] = { .dt_id = TEGRA210_CLK_SOR1_OUT, .present = true },
2357 [tegra_clk_gpu] = { .dt_id = TEGRA210_CLK_GPU, .present = true },
2358 [tegra_clk_pll_g_ref] = { .dt_id = TEGRA210_CLK_PLL_G_REF, .present = true, },
2359 [tegra_clk_uartb_8] = { .dt_id = TEGRA210_CLK_UARTB, .present = true },
2360 [tegra_clk_spdif_in_8] = { .dt_id = TEGRA210_CLK_SPDIF_IN, .present = true },
2361 [tegra_clk_spdif_out] = { .dt_id = TEGRA210_CLK_SPDIF_OUT, .present = true },
2362 [tegra_clk_vi_10] = { .dt_id = TEGRA210_CLK_VI, .present = true },

--- 1228 unchanged lines hidden ---