clk-tegra20.c (1d7e2c8e5431454f65f0b785f3aa8bdba2ff436d) clk-tegra20.c (899f8095e66c562888ff617686e46019b758611b)
1/*
2 * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT

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517 { .dev_id = "tegra_uart.2", .dt_id = TEGRA20_CLK_UARTC },
518 { .dev_id = "tegra_uart.3", .dt_id = TEGRA20_CLK_UARTD },
519 { .dev_id = "tegra_uart.4", .dt_id = TEGRA20_CLK_UARTE },
520 { .dev_id = "tegradc.0", .dt_id = TEGRA20_CLK_DISP1 },
521 { .dev_id = "tegradc.1", .dt_id = TEGRA20_CLK_DISP2 },
522};
523
524static struct tegra_clk tegra20_clks[tegra_clk_max] __initdata = {
1/*
2 * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT

--- 508 unchanged lines hidden (view full) ---

517 { .dev_id = "tegra_uart.2", .dt_id = TEGRA20_CLK_UARTC },
518 { .dev_id = "tegra_uart.3", .dt_id = TEGRA20_CLK_UARTD },
519 { .dev_id = "tegra_uart.4", .dt_id = TEGRA20_CLK_UARTE },
520 { .dev_id = "tegradc.0", .dt_id = TEGRA20_CLK_DISP1 },
521 { .dev_id = "tegradc.1", .dt_id = TEGRA20_CLK_DISP2 },
522};
523
524static struct tegra_clk tegra20_clks[tegra_clk_max] __initdata = {
525 [tegra_clk_ahbdma] = { .dt_id = TEGRA20_CLK_AHBDMA, .present = true },
525 [tegra_clk_spdif_out] = { .dt_id = TEGRA20_CLK_SPDIF_OUT, .present = true },
526 [tegra_clk_spdif_in] = { .dt_id = TEGRA20_CLK_SPDIF_IN, .present = true },
527 [tegra_clk_sdmmc1] = { .dt_id = TEGRA20_CLK_SDMMC1, .present = true },
528 [tegra_clk_sdmmc2] = { .dt_id = TEGRA20_CLK_SDMMC2, .present = true },
529 [tegra_clk_sdmmc3] = { .dt_id = TEGRA20_CLK_SDMMC3, .present = true },
530 [tegra_clk_sdmmc4] = { .dt_id = TEGRA20_CLK_SDMMC4, .present = true },
531 [tegra_clk_la] = { .dt_id = TEGRA20_CLK_LA, .present = true },
532 [tegra_clk_csite] = { .dt_id = TEGRA20_CLK_CSITE, .present = true },

--- 598 unchanged lines hidden --- 		526 [tegra_clk_spdif_out] = { .dt_id = TEGRA20_CLK_SPDIF_OUT, .present = true },
527 [tegra_clk_spdif_in] = { .dt_id = TEGRA20_CLK_SPDIF_IN, .present = true },
528 [tegra_clk_sdmmc1] = { .dt_id = TEGRA20_CLK_SDMMC1, .present = true },
529 [tegra_clk_sdmmc2] = { .dt_id = TEGRA20_CLK_SDMMC2, .present = true },
530 [tegra_clk_sdmmc3] = { .dt_id = TEGRA20_CLK_SDMMC3, .present = true },
531 [tegra_clk_sdmmc4] = { .dt_id = TEGRA20_CLK_SDMMC4, .present = true },
532 [tegra_clk_la] = { .dt_id = TEGRA20_CLK_LA, .present = true },
533 [tegra_clk_csite] = { .dt_id = TEGRA20_CLK_CSITE, .present = true },

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