clkgen-pll.c (c57d5621d2f2dc238f4b9c4d00b2a54187a75445) clkgen-pll.c (d5f728acd90e864251139ffc59294b336cf4b382)
1/*
2 * Copyright (C) 2014 STMicroelectronics (R&D) Limited
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 */
10
11/*
12 * Authors:
13 * Stephen Gallimore <stephen.gallimore@st.com>,
14 * Pankaj Dev <pankaj.dev@st.com>.
15 */
16
17#include <linux/slab.h>
18#include <linux/of_address.h>
1/*
2 * Copyright (C) 2014 STMicroelectronics (R&D) Limited
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 */
10
11/*
12 * Authors:
13 * Stephen Gallimore <stephen.gallimore@st.com>,
14 * Pankaj Dev <pankaj.dev@st.com>.
15 */
16
17#include <linux/slab.h>
18#include <linux/of_address.h>
19#include <linux/clk.h>
19#include <linux/clk-provider.h>
20
21#include "clkgen.h"
22
23static DEFINE_SPINLOCK(clkgena_c32_odf_lock);
24
25/*
26 * Common PLL configuration register bits for PLL800 and PLL1600 C65

--- 374 unchanged lines hidden (view full) ---

401
402 pll = kzalloc(sizeof(*pll), GFP_KERNEL);
403 if (!pll)
404 return ERR_PTR(-ENOMEM);
405
406 init.name = clk_name;
407 init.ops = pll_data->ops;
408
20#include <linux/clk-provider.h>
21
22#include "clkgen.h"
23
24static DEFINE_SPINLOCK(clkgena_c32_odf_lock);
25
26/*
27 * Common PLL configuration register bits for PLL800 and PLL1600 C65

--- 374 unchanged lines hidden (view full) ---

402
403 pll = kzalloc(sizeof(*pll), GFP_KERNEL);
404 if (!pll)
405 return ERR_PTR(-ENOMEM);
406
407 init.name = clk_name;
408 init.ops = pll_data->ops;
409
409 init.flags = CLK_IS_BASIC | CLK_GET_RATE_NOCACHE;
410 init.flags = CLK_IS_BASIC;
410 init.parent_names = &parent_name;
411 init.num_parents = 1;
412
413 pll->data = pll_data;
414 pll->regs_base = reg;
415 pll->hw.init = &init;
416
417 clk = clk_register(NULL, &pll->hw);

--- 346 unchanged lines hidden --- 		411 init.parent_names = &parent_name;
412 init.num_parents = 1;
413
414 pll->data = pll_data;
415 pll->regs_base = reg;
416 pll->hw.init = &init;
417
418 clk = clk_register(NULL, &pll->hw);

--- 346 unchanged lines hidden ---