sifive-prci.c (c61287bf17836b67e0b649343778bb4a659bd70d) sifive-prci.c (e4d368e0b632717e57d064ade6afdcf535e58068)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2020 SiFive, Inc.
4 * Copyright (C) 2020 Zong Li
5 */
6
7#include <linux/clkdev.h>
8#include <linux/delay.h>

--- 574 unchanged lines hidden (view full) ---

583 if (!pd)
584 return -ENOMEM;
585
586 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
587 pd->va = devm_ioremap_resource(dev, res);
588 if (IS_ERR(pd->va))
589 return PTR_ERR(pd->va);
590
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2020 SiFive, Inc.
4 * Copyright (C) 2020 Zong Li
5 */
6
7#include <linux/clkdev.h>
8#include <linux/delay.h>

--- 574 unchanged lines hidden (view full) ---

583 if (!pd)
584 return -ENOMEM;
585
586 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
587 pd->va = devm_ioremap_resource(dev, res);
588 if (IS_ERR(pd->va))
589 return PTR_ERR(pd->va);
590
591 pd->reset.rcdev.owner = THIS_MODULE;
592 pd->reset.rcdev.nr_resets = PRCI_RST_NR;
593 pd->reset.rcdev.ops = &reset_simple_ops;
594 pd->reset.rcdev.of_node = pdev->dev.of_node;
595 pd->reset.active_low = true;
596 pd->reset.membase = pd->va + PRCI_DEVICESRESETREG_OFFSET;
597 spin_lock_init(&pd->reset.lock);
598
599 r = devm_reset_controller_register(&pdev->dev, &pd->reset.rcdev);
600 if (r) {
601 dev_err(dev, "could not register reset controller: %d\n", r);
602 return r;
603 }
591 r = __prci_register_clocks(dev, pd, desc);
592 if (r) {
593 dev_err(dev, "could not register clocks: %d\n", r);
594 return r;
595 }
596
597 dev_dbg(dev, "SiFive PRCI probed\n");
598

--- 22 unchanged lines hidden --- 		604 r = __prci_register_clocks(dev, pd, desc);
605 if (r) {
606 dev_err(dev, "could not register clocks: %d\n", r);
607 return r;
608 }
609
610 dev_dbg(dev, "SiFive PRCI probed\n");
611

--- 22 unchanged lines hidden ---