| clk.c (f26e8817b235d8764363bffcc9cbfc61867371f2) | clk.c (cb1d9f6ddaa436f2dce2710740b7a3546700949c) |
|---|---|
| 1/* 2 * Copyright (c) 2014 MundoReader S.L. 3 * Author: Heiko Stuebner <heiko@sntech.de> 4 * 5 * Copyright (c) 2016 Rockchip Electronics Co. Ltd. 6 * Author: Xing Zheng <zhengxing@rock-chips.com> 7 * 8 * based on --- 371 unchanged lines hidden (view full) --- 380 int idx; 381 382 for (idx = 0; idx < nr_pll; idx++, list++) { 383 clk = rockchip_clk_register_pll(ctx, list->type, list->name, 384 list->parent_names, list->num_parents, 385 list->con_offset, grf_lock_offset, 386 list->lock_shift, list->mode_offset, 387 list->mode_shift, list->rate_table, | 1/* 2 * Copyright (c) 2014 MundoReader S.L. 3 * Author: Heiko Stuebner <heiko@sntech.de> 4 * 5 * Copyright (c) 2016 Rockchip Electronics Co. Ltd. 6 * Author: Xing Zheng <zhengxing@rock-chips.com> 7 * 8 * based on --- 371 unchanged lines hidden (view full) --- 380 int idx; 381 382 for (idx = 0; idx < nr_pll; idx++, list++) { 383 clk = rockchip_clk_register_pll(ctx, list->type, list->name, 384 list->parent_names, list->num_parents, 385 list->con_offset, grf_lock_offset, 386 list->lock_shift, list->mode_offset, 387 list->mode_shift, list->rate_table, |
| 388 list->pll_flags); | 388 list->flags, list->pll_flags); |
| 389 if (IS_ERR(clk)) { 390 pr_err("%s: failed to register clock %s\n", __func__, 391 list->name); 392 continue; 393 } 394 395 rockchip_clk_add_lookup(ctx, clk, list->id); 396 } --- 15 unchanged lines hidden (view full) --- 412 switch (list->branch_type) { 413 case branch_mux: 414 clk = clk_register_mux(NULL, list->name, 415 list->parent_names, list->num_parents, 416 flags, ctx->reg_base + list->muxdiv_offset, 417 list->mux_shift, list->mux_width, 418 list->mux_flags, &ctx->lock); 419 break; | 389 if (IS_ERR(clk)) { 390 pr_err("%s: failed to register clock %s\n", __func__, 391 list->name); 392 continue; 393 } 394 395 rockchip_clk_add_lookup(ctx, clk, list->id); 396 } --- 15 unchanged lines hidden (view full) --- 412 switch (list->branch_type) { 413 case branch_mux: 414 clk = clk_register_mux(NULL, list->name, 415 list->parent_names, list->num_parents, 416 flags, ctx->reg_base + list->muxdiv_offset, 417 list->mux_shift, list->mux_width, 418 list->mux_flags, &ctx->lock); 419 break; |
| 420 case branch_muxgrf: 421 clk = rockchip_clk_register_muxgrf(list->name, 422 list->parent_names, list->num_parents, 423 flags, ctx->grf, list->muxdiv_offset, 424 list->mux_shift, list->mux_width, 425 list->mux_flags); 426 break; |
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| 420 case branch_divider: 421 if (list->div_table) 422 clk = clk_register_divider_table(NULL, 423 list->name, list->parent_names[0], 424 flags, 425 ctx->reg_base + list->muxdiv_offset, 426 list->div_shift, list->div_width, 427 list->div_flags, list->div_table, --- 51 unchanged lines hidden (view full) --- 479 case branch_factor: 480 clk = rockchip_clk_register_factor_branch( 481 list->name, list->parent_names, 482 list->num_parents, ctx->reg_base, 483 list->div_shift, list->div_width, 484 list->gate_offset, list->gate_shift, 485 list->gate_flags, flags, &ctx->lock); 486 break; | 427 case branch_divider: 428 if (list->div_table) 429 clk = clk_register_divider_table(NULL, 430 list->name, list->parent_names[0], 431 flags, 432 ctx->reg_base + list->muxdiv_offset, 433 list->div_shift, list->div_width, 434 list->div_flags, list->div_table, --- 51 unchanged lines hidden (view full) --- 486 case branch_factor: 487 clk = rockchip_clk_register_factor_branch( 488 list->name, list->parent_names, 489 list->num_parents, ctx->reg_base, 490 list->div_shift, list->div_width, 491 list->gate_offset, list->gate_shift, 492 list->gate_flags, flags, &ctx->lock); 493 break; |
| 494 case branch_ddrclk: 495 clk = rockchip_clk_register_ddrclk( 496 list->name, list->flags, 497 list->parent_names, list->num_parents, 498 list->muxdiv_offset, list->mux_shift, 499 list->mux_width, list->div_shift, 500 list->div_width, list->div_flags, 501 ctx->reg_base, &ctx->lock); 502 break; |
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| 487 } 488 489 /* none of the cases above matched */ 490 if (!clk) { 491 pr_err("%s: unknown clock type %d\n", 492 __func__, list->branch_type); 493 continue; 494 } --- 80 unchanged lines hidden --- | 503 } 504 505 /* none of the cases above matched */ 506 if (!clk) { 507 pr_err("%s: unknown clock type %d\n", 508 __func__, list->branch_type); 509 continue; 510 } --- 80 unchanged lines hidden --- |