r9a07g044-cpg.c (d85b82f09a03c2e1f06da740c6c47dd098b16ca5) | r9a07g044-cpg.c (0aae437ac5c264e8e2cb6c3fead20b44d2fa31d1) |
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1// SPDX-License-Identifier: GPL-2.0 2/* 3 * RZ/G2L CPG driver 4 * 5 * Copyright (C) 2021 Renesas Electronics Corp. 6 */ 7 8#include <linux/clk-provider.h> 9#include <linux/device.h> 10#include <linux/init.h> 11#include <linux/kernel.h> 12 13#include <dt-bindings/clock/r9a07g044-cpg.h> 14 | 1// SPDX-License-Identifier: GPL-2.0 2/* 3 * RZ/G2L CPG driver 4 * 5 * Copyright (C) 2021 Renesas Electronics Corp. 6 */ 7 8#include <linux/clk-provider.h> 9#include <linux/device.h> 10#include <linux/init.h> 11#include <linux/kernel.h> 12 13#include <dt-bindings/clock/r9a07g044-cpg.h> 14 |
15#include "renesas-rzg2l-cpg.h" | 15#include "rzg2l-cpg.h" |
16 17enum clk_ids { 18 /* Core Clock Outputs exported to DT */ 19 LAST_DT_CORE_CLK = R9A07G044_OSCCLK, 20 21 /* External Input Clocks */ 22 CLK_EXTAL, 23 --- 176 unchanged lines hidden --- | 16 17enum clk_ids { 18 /* Core Clock Outputs exported to DT */ 19 LAST_DT_CORE_CLK = R9A07G044_OSCCLK, 20 21 /* External Input Clocks */ 22 CLK_EXTAL, 23 --- 176 unchanged lines hidden --- |