Kconfig (9095bf25ea08135a5b74875dd0e3eeaddc4218a0) Kconfig (80978a4be267e1783444841143cdb0f0eb40061c)
1config CLK_RENESAS
2 bool "Renesas SoC clock support" if COMPILE_TEST && !ARCH_RENESAS
3 default y if ARCH_RENESAS
4 select CLK_EMEV2 if ARCH_EMEV2
5 select CLK_RZA1 if ARCH_R7S72100
6 select CLK_R8A73A4 if ARCH_R8A73A4
7 select CLK_R8A7740 if ARCH_R8A7740
8 select CLK_R8A7743 if ARCH_R8A7743
9 select CLK_R8A7745 if ARCH_R8A7745
10 select CLK_R8A7778 if ARCH_R8A7778
11 select CLK_R8A7779 if ARCH_R8A7779
12 select CLK_R8A7790 if ARCH_R8A7790
13 select CLK_R8A7791 if ARCH_R8A7791 || ARCH_R8A7793
14 select CLK_R8A7792 if ARCH_R8A7792
15 select CLK_R8A7794 if ARCH_R8A7794
16 select CLK_R8A7795 if ARCH_R8A7795
17 select CLK_R8A7796 if ARCH_R8A7796
18 select CLK_SH73A0 if ARCH_SH73A0
19
20if CLK_RENESAS
21
22# SoC
23config CLK_EMEV2
24 bool "Emma Mobile EV2 clock support" if COMPILE_TEST
25
26config CLK_RZA1
27 bool
28 select CLK_RENESAS_CPG_MSTP
29
30config CLK_R8A73A4
31 bool
32 select CLK_RENESAS_CPG_MSTP
33 select CLK_RENESAS_DIV6
34
35config CLK_R8A7740
36 bool
37 select CLK_RENESAS_CPG_MSTP
38 select CLK_RENESAS_DIV6
39
40config CLK_R8A7743
41 bool
42 select CLK_RCAR_GEN2_CPG
43
44config CLK_R8A7745
45 bool
46 select CLK_RCAR_GEN2_CPG
47
48config CLK_R8A7778
49 bool
50 select CLK_RENESAS_CPG_MSTP
51
52config CLK_R8A7779
53 bool
54 select CLK_RENESAS_CPG_MSTP
55
56config CLK_R8A7790
57 bool
58 select CLK_RCAR_GEN2
59 select CLK_RENESAS_DIV6
60
61config CLK_R8A7791
62 bool
63 select CLK_RCAR_GEN2
64 select CLK_RENESAS_DIV6
65
66config CLK_R8A7792
67 bool
68 select CLK_RCAR_GEN2
69
70config CLK_R8A7794
71 bool
72 select CLK_RCAR_GEN2
73 select CLK_RENESAS_DIV6
74
75config CLK_R8A7795
76 bool
77 select CLK_RCAR_GEN3_CPG
78
79config CLK_R8A7796
80 bool
81 select CLK_RCAR_GEN3_CPG
82
83config CLK_SH73A0
84 bool
85 select CLK_RENESAS_CPG_MSTP
86 select CLK_RENESAS_DIV6
87
88
89# Family
90config CLK_RCAR_GEN2
91 bool
92 select CLK_RENESAS_CPG_MSTP
93 select CLK_RENESAS_DIV6
94
95config CLK_RCAR_GEN2_CPG
96 bool
97 select CLK_RENESAS_CPG_MSSR
98
99config CLK_RCAR_GEN3_CPG
100 bool
101 select CLK_RENESAS_CPG_MSSR
102
103
104# Generic
1config CLK_RENESAS_CPG_MSSR
2 bool
105config CLK_RENESAS_CPG_MSSR
106 bool
3 default y if ARCH_R8A7743
4 default y if ARCH_R8A7745
5 default y if ARCH_R8A7795
6 default y if ARCH_R8A7796
107 select CLK_RENESAS_DIV6
7
8config CLK_RENESAS_CPG_MSTP
9 bool
108
109config CLK_RENESAS_CPG_MSTP
110 bool
10 default y if ARCH_R7S72100
11 default y if ARCH_R8A73A4
12 default y if ARCH_R8A7740
13 default y if ARCH_R8A7778
14 default y if ARCH_R8A7779
15 default y if ARCH_R8A7790
16 default y if ARCH_R8A7791
17 default y if ARCH_R8A7792
18 default y if ARCH_R8A7793
19 default y if ARCH_R8A7794
20 default y if ARCH_SH73A0
111
112config CLK_RENESAS_DIV6
113 bool "DIV6 clock support" if COMPILE_TEST
114
115endif # CLK_RENESAS