Kconfig (651a88798412e216f337d70181127e847f00a4b7) Kconfig (c8b088224c25ef4f5270f9de6a3516181b63f38c)
1# SPDX-License-Identifier: GPL-2.0
2
3config CLK_RENESAS
4 bool "Renesas SoC clock support" if COMPILE_TEST && !ARCH_RENESAS
5 default y if ARCH_RENESAS
6 select CLK_EMEV2 if ARCH_EMEV2
7 select CLK_RZA1 if ARCH_R7S72100
8 select CLK_R7S9210 if ARCH_R7S9210

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28 select CLK_R8A77965 if ARCH_R8A77965
29 select CLK_R8A77970 if ARCH_R8A77970
30 select CLK_R8A77980 if ARCH_R8A77980
31 select CLK_R8A77990 if ARCH_R8A77990
32 select CLK_R8A77995 if ARCH_R8A77995
33 select CLK_R8A779A0 if ARCH_R8A779A0
34 select CLK_R8A779F0 if ARCH_R8A779F0
35 select CLK_R9A06G032 if ARCH_R9A06G032
1# SPDX-License-Identifier: GPL-2.0
2
3config CLK_RENESAS
4 bool "Renesas SoC clock support" if COMPILE_TEST && !ARCH_RENESAS
5 default y if ARCH_RENESAS
6 select CLK_EMEV2 if ARCH_EMEV2
7 select CLK_RZA1 if ARCH_R7S72100
8 select CLK_R7S9210 if ARCH_R7S9210

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28 select CLK_R8A77965 if ARCH_R8A77965
29 select CLK_R8A77970 if ARCH_R8A77970
30 select CLK_R8A77980 if ARCH_R8A77980
31 select CLK_R8A77990 if ARCH_R8A77990
32 select CLK_R8A77995 if ARCH_R8A77995
33 select CLK_R8A779A0 if ARCH_R8A779A0
34 select CLK_R8A779F0 if ARCH_R8A779F0
35 select CLK_R9A06G032 if ARCH_R9A06G032
36 select CLK_R9A07G043 if ARCH_R9A07G043
36 select CLK_R9A07G044 if ARCH_R9A07G044
37 select CLK_R9A07G054 if ARCH_R9A07G054
38 select CLK_SH73A0 if ARCH_SH73A0
39
40if CLK_RENESAS
41
42# SoC
43config CLK_EMEV2

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155
156config CLK_R8A779F0
157 bool "R-Car S4-8 clock support" if COMPILE_TEST
158 select CLK_RCAR_GEN4_CPG
159
160config CLK_R9A06G032
161 bool "RZ/N1D clock support" if COMPILE_TEST
162
37 select CLK_R9A07G044 if ARCH_R9A07G044
38 select CLK_R9A07G054 if ARCH_R9A07G054
39 select CLK_SH73A0 if ARCH_SH73A0
40
41if CLK_RENESAS
42
43# SoC
44config CLK_EMEV2

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156
157config CLK_R8A779F0
158 bool "R-Car S4-8 clock support" if COMPILE_TEST
159 select CLK_RCAR_GEN4_CPG
160
161config CLK_R9A06G032
162 bool "RZ/N1D clock support" if COMPILE_TEST
163
164config CLK_R9A07G043
165 bool "RZ/G2UL clock support" if COMPILE_TEST
166 select CLK_RZG2L
167
163config CLK_R9A07G044
164 bool "RZ/G2L clock support" if COMPILE_TEST
165 select CLK_RZG2L
166
167config CLK_R9A07G054
168 bool "RZ/V2L clock support" if COMPILE_TEST
169 select CLK_RZG2L
170

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195config CLK_RCAR_USB2_CLOCK_SEL
196 bool "Renesas R-Car USB2 clock selector support"
197 depends on ARCH_RENESAS || COMPILE_TEST
198 select RESET_CONTROLLER
199 help
200 This is a driver for R-Car USB2 clock selector
201
202config CLK_RZG2L
168config CLK_R9A07G044
169 bool "RZ/G2L clock support" if COMPILE_TEST
170 select CLK_RZG2L
171
172config CLK_R9A07G054
173 bool "RZ/V2L clock support" if COMPILE_TEST
174 select CLK_RZG2L
175

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200config CLK_RCAR_USB2_CLOCK_SEL
201 bool "Renesas R-Car USB2 clock selector support"
202 depends on ARCH_RENESAS || COMPILE_TEST
203 select RESET_CONTROLLER
204 help
205 This is a driver for R-Car USB2 clock selector
206
207config CLK_RZG2L
203 bool "Renesas RZ/{G2L,V2L} family clock support" if COMPILE_TEST
208 bool "Renesas RZ/{G2L,G2UL,V2L} family clock support" if COMPILE_TEST
204 select RESET_CONTROLLER
205
206# Generic
207config CLK_RENESAS_CPG_MSSR
208 bool "CPG/MSSR clock support" if COMPILE_TEST
209 select CLK_RENESAS_DIV6
210
211config CLK_RENESAS_CPG_MSTP
212 bool "MSTP clock support" if COMPILE_TEST
213
214config CLK_RENESAS_DIV6
215 bool "DIV6 clock support" if COMPILE_TEST
216
217endif # CLK_RENESAS
209 select RESET_CONTROLLER
210
211# Generic
212config CLK_RENESAS_CPG_MSSR
213 bool "CPG/MSSR clock support" if COMPILE_TEST
214 select CLK_RENESAS_DIV6
215
216config CLK_RENESAS_CPG_MSTP
217 bool "MSTP clock support" if COMPILE_TEST
218
219config CLK_RENESAS_DIV6
220 bool "DIV6 clock support" if COMPILE_TEST
221
222endif # CLK_RENESAS