| Kconfig (0ab55cf1834177a2162757fee2ac3cb6730beb20) | Kconfig (1dd65bb08604ad2906d839c243e1bede2b0efe53) |
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| 1# SPDX-License-Identifier: GPL-2.0 2 3config CLK_RENESAS 4 bool "Renesas SoC clock support" if COMPILE_TEST && !ARCH_RENESAS 5 default y if ARCH_RENESAS 6 select CLK_EMEV2 if ARCH_EMEV2 7 select CLK_RZA1 if ARCH_R7S72100 8 select CLK_R7S9210 if ARCH_R7S9210 --- 23 unchanged lines hidden (view full) --- 32 select CLK_R8A77995 if ARCH_R8A77995 33 select CLK_R8A779A0 if ARCH_R8A779A0 34 select CLK_R8A779F0 if ARCH_R8A779F0 35 select CLK_R8A779G0 if ARCH_R8A779G0 36 select CLK_R9A06G032 if ARCH_R9A06G032 37 select CLK_R9A07G043 if ARCH_R9A07G043 38 select CLK_R9A07G044 if ARCH_R9A07G044 39 select CLK_R9A07G054 if ARCH_R9A07G054 | 1# SPDX-License-Identifier: GPL-2.0 2 3config CLK_RENESAS 4 bool "Renesas SoC clock support" if COMPILE_TEST && !ARCH_RENESAS 5 default y if ARCH_RENESAS 6 select CLK_EMEV2 if ARCH_EMEV2 7 select CLK_RZA1 if ARCH_R7S72100 8 select CLK_R7S9210 if ARCH_R7S9210 --- 23 unchanged lines hidden (view full) --- 32 select CLK_R8A77995 if ARCH_R8A77995 33 select CLK_R8A779A0 if ARCH_R8A779A0 34 select CLK_R8A779F0 if ARCH_R8A779F0 35 select CLK_R8A779G0 if ARCH_R8A779G0 36 select CLK_R9A06G032 if ARCH_R9A06G032 37 select CLK_R9A07G043 if ARCH_R9A07G043 38 select CLK_R9A07G044 if ARCH_R9A07G044 39 select CLK_R9A07G054 if ARCH_R9A07G054 |
| 40 select CLK_R9A09G011 if ARCH_R9A09G011 |
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| 40 select CLK_SH73A0 if ARCH_SH73A0 41 42if CLK_RENESAS 43 44# SoC 45config CLK_EMEV2 46 bool "Emma Mobile EV2 clock support" if COMPILE_TEST 47 --- 125 unchanged lines hidden (view full) --- 173config CLK_R9A07G044 174 bool "RZ/G2L clock support" if COMPILE_TEST 175 select CLK_RZG2L 176 177config CLK_R9A07G054 178 bool "RZ/V2L clock support" if COMPILE_TEST 179 select CLK_RZG2L 180 | 41 select CLK_SH73A0 if ARCH_SH73A0 42 43if CLK_RENESAS 44 45# SoC 46config CLK_EMEV2 47 bool "Emma Mobile EV2 clock support" if COMPILE_TEST 48 --- 125 unchanged lines hidden (view full) --- 174config CLK_R9A07G044 175 bool "RZ/G2L clock support" if COMPILE_TEST 176 select CLK_RZG2L 177 178config CLK_R9A07G054 179 bool "RZ/V2L clock support" if COMPILE_TEST 180 select CLK_RZG2L 181 |
| 182config CLK_R9A09G011 183 bool "RZ/V2M clock support" if COMPILE_TEST 184 select CLK_RZG2L 185 |
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| 181config CLK_SH73A0 182 bool "SH-Mobile AG5 clock support" if COMPILE_TEST 183 select CLK_RENESAS_CPG_MSTP 184 select CLK_RENESAS_DIV6 185 186 187# Family 188config CLK_RCAR_CPG_LIB --- 39 unchanged lines hidden --- | 186config CLK_SH73A0 187 bool "SH-Mobile AG5 clock support" if COMPILE_TEST 188 select CLK_RENESAS_CPG_MSTP 189 select CLK_RENESAS_DIV6 190 191 192# Family 193config CLK_RCAR_CPG_LIB --- 39 unchanged lines hidden --- |