clk-imx8qxp.c (5964012ce37e66d2588a9bc82f7184a008851cac) clk-imx8qxp.c (afd0406b4663014ef1f5993454db89c8a0e8bb42)
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2018-2021 NXP
4 * Dong Aisheng <aisheng.dong@nxp.com>
5 */
6
7#include <linux/clk-provider.h>
8#include <linux/err.h>

--- 120 unchanged lines hidden (view full) ---

129 imx_clk_scu_unregister();
130
131 return ret;
132}
133
134static const struct of_device_id imx8qxp_match[] = {
135 { .compatible = "fsl,scu-clk", },
136 { .compatible = "fsl,imx8qxp-clk", &imx_clk_scu_rsrc_imx8qxp, },
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2018-2021 NXP
4 * Dong Aisheng <aisheng.dong@nxp.com>
5 */
6
7#include <linux/clk-provider.h>
8#include <linux/err.h>

--- 120 unchanged lines hidden (view full) ---

129 imx_clk_scu_unregister();
130
131 return ret;
132}
133
134static const struct of_device_id imx8qxp_match[] = {
135 { .compatible = "fsl,scu-clk", },
136 { .compatible = "fsl,imx8qxp-clk", &imx_clk_scu_rsrc_imx8qxp, },
137 { .compatible = "fsl,imx8qm-clk", &imx_clk_scu_rsrc_imx8qm, },
137 { /* sentinel */ }
138};
139
140static struct platform_driver imx8qxp_clk_driver = {
141 .driver = {
142 .name = "imx8qxp-clk",
143 .of_match_table = imx8qxp_match,
144 .suppress_bind_attrs = true,
145 },
146 .probe = imx8qxp_clk_probe,
147};
148builtin_platform_driver(imx8qxp_clk_driver);
149
150MODULE_AUTHOR("Aisheng Dong <aisheng.dong@nxp.com>");
151MODULE_DESCRIPTION("NXP i.MX8QXP clock driver");
152MODULE_LICENSE("GPL v2");
138 { /* sentinel */ }
139};
140
141static struct platform_driver imx8qxp_clk_driver = {
142 .driver = {
143 .name = "imx8qxp-clk",
144 .of_match_table = imx8qxp_match,
145 .suppress_bind_attrs = true,
146 },
147 .probe = imx8qxp_clk_probe,
148};
149builtin_platform_driver(imx8qxp_clk_driver);
150
151MODULE_AUTHOR("Aisheng Dong <aisheng.dong@nxp.com>");
152MODULE_DESCRIPTION("NXP i.MX8QXP clock driver");
153MODULE_LICENSE("GPL v2");