clk-hi3519.c (1ac731c529cd4d6adbce134754b51ff7d822b145) clk-hi3519.c (74e39f526d95c0c119ada1874871ee328c59fbee)
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Hi3519 Clock Driver
4 *
5 * Copyright (c) 2015-2016 HiSilicon Technologies Co., Ltd.
6 */
7
8#include <dt-bindings/clock/hi3519-clock.h>

--- 116 unchanged lines hidden (view full) ---

125
126static void hi3519_clk_unregister(struct platform_device *pdev)
127{
128 struct hi3519_crg_data *crg = platform_get_drvdata(pdev);
129
130 of_clk_del_provider(pdev->dev.of_node);
131
132 hisi_clk_unregister_gate(hi3519_gate_clks,
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Hi3519 Clock Driver
4 *
5 * Copyright (c) 2015-2016 HiSilicon Technologies Co., Ltd.
6 */
7
8#include <dt-bindings/clock/hi3519-clock.h>

--- 116 unchanged lines hidden (view full) ---

125
126static void hi3519_clk_unregister(struct platform_device *pdev)
127{
128 struct hi3519_crg_data *crg = platform_get_drvdata(pdev);
129
130 of_clk_del_provider(pdev->dev.of_node);
131
132 hisi_clk_unregister_gate(hi3519_gate_clks,
133 ARRAY_SIZE(hi3519_mux_clks),
133 ARRAY_SIZE(hi3519_gate_clks),
134 crg->clk_data);
135 hisi_clk_unregister_mux(hi3519_mux_clks,
136 ARRAY_SIZE(hi3519_mux_clks),
137 crg->clk_data);
138 hisi_clk_unregister_fixed_rate(hi3519_fixed_rate_clks,
139 ARRAY_SIZE(hi3519_fixed_rate_clks),
140 crg->clk_data);
141}

--- 61 unchanged lines hidden --- 		134 crg->clk_data);
135 hisi_clk_unregister_mux(hi3519_mux_clks,
136 ARRAY_SIZE(hi3519_mux_clks),
137 crg->clk_data);
138 hisi_clk_unregister_fixed_rate(hi3519_fixed_rate_clks,
139 ARRAY_SIZE(hi3519_fixed_rate_clks),
140 crg->clk_data);
141}

--- 61 unchanged lines hidden ---