pll.c (17d8bacf19bb5ea5f258f9c0644d5688f9ba03a9) pll.c (4eff0bebf4ed5ed6d1a4dffe7dfd420b270c229a)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * PLL clock driver for TI Davinci SoCs
4 *
5 * Copyright (C) 2018 David Lechner <david@lechnology.com>
6 *
7 * Based on arch/arm/mach-davinci/clock.c
8 * Copyright (C) 2006-2007 Texas Instruments.

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855 if (dev->of_node)
856 pdata->cfgchip =
857 syscon_regmap_lookup_by_compatible("ti,da830-cfgchip");
858
859 return pdata;
860}
861
862/* needed in early boot for clocksource/clockevent */
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * PLL clock driver for TI Davinci SoCs
4 *
5 * Copyright (C) 2018 David Lechner <david@lechnology.com>
6 *
7 * Based on arch/arm/mach-davinci/clock.c
8 * Copyright (C) 2006-2007 Texas Instruments.

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855 if (dev->of_node)
856 pdata->cfgchip =
857 syscon_regmap_lookup_by_compatible("ti,da830-cfgchip");
858
859 return pdata;
860}
861
862/* needed in early boot for clocksource/clockevent */
863#ifdef CONFIG_ARCH_DAVINCI_DA850
863CLK_OF_DECLARE(da850_pll0, "ti,da850-pll0", of_da850_pll0_init);
864CLK_OF_DECLARE(da850_pll0, "ti,da850-pll0", of_da850_pll0_init);
865#endif
864
865static const struct of_device_id davinci_pll_of_match[] = {
866
867static const struct of_device_id davinci_pll_of_match[] = {
868#ifdef CONFIG_ARCH_DAVINCI_DA850
866 { .compatible = "ti,da850-pll1", .data = of_da850_pll1_init },
869 { .compatible = "ti,da850-pll1", .data = of_da850_pll1_init },
870#endif
867 { }
868};
869
870static const struct platform_device_id davinci_pll_id_table[] = {
871 { }
872};
873
874static const struct platform_device_id davinci_pll_id_table[] = {
875#ifdef CONFIG_ARCH_DAVINCI_DA830
871 { .name = "da830-pll", .driver_data = (kernel_ulong_t)da830_pll_init },
876 { .name = "da830-pll", .driver_data = (kernel_ulong_t)da830_pll_init },
877#endif
878#ifdef CONFIG_ARCH_DAVINCI_DA850
872 { .name = "da850-pll0", .driver_data = (kernel_ulong_t)da850_pll0_init },
873 { .name = "da850-pll1", .driver_data = (kernel_ulong_t)da850_pll1_init },
879 { .name = "da850-pll0", .driver_data = (kernel_ulong_t)da850_pll0_init },
880 { .name = "da850-pll1", .driver_data = (kernel_ulong_t)da850_pll1_init },
881#endif
882#ifdef CONFIG_ARCH_DAVINCI_DM355
874 { .name = "dm355-pll1", .driver_data = (kernel_ulong_t)dm355_pll1_init },
875 { .name = "dm355-pll2", .driver_data = (kernel_ulong_t)dm355_pll2_init },
883 { .name = "dm355-pll1", .driver_data = (kernel_ulong_t)dm355_pll1_init },
884 { .name = "dm355-pll2", .driver_data = (kernel_ulong_t)dm355_pll2_init },
885#endif
886#ifdef CONFIG_ARCH_DAVINCI_DM365
876 { .name = "dm365-pll1", .driver_data = (kernel_ulong_t)dm365_pll1_init },
877 { .name = "dm365-pll2", .driver_data = (kernel_ulong_t)dm365_pll2_init },
887 { .name = "dm365-pll1", .driver_data = (kernel_ulong_t)dm365_pll1_init },
888 { .name = "dm365-pll2", .driver_data = (kernel_ulong_t)dm365_pll2_init },
889#endif
890#ifdef CONFIG_ARCH_DAVINCI_DM644x
878 { .name = "dm644x-pll1", .driver_data = (kernel_ulong_t)dm644x_pll1_init },
879 { .name = "dm644x-pll2", .driver_data = (kernel_ulong_t)dm644x_pll2_init },
891 { .name = "dm644x-pll1", .driver_data = (kernel_ulong_t)dm644x_pll1_init },
892 { .name = "dm644x-pll2", .driver_data = (kernel_ulong_t)dm644x_pll2_init },
893#endif
894#ifdef CONFIG_ARCH_DAVINCI_DM646x
880 { .name = "dm646x-pll1", .driver_data = (kernel_ulong_t)dm646x_pll1_init },
881 { .name = "dm646x-pll2", .driver_data = (kernel_ulong_t)dm646x_pll2_init },
895 { .name = "dm646x-pll1", .driver_data = (kernel_ulong_t)dm646x_pll1_init },
896 { .name = "dm646x-pll2", .driver_data = (kernel_ulong_t)dm646x_pll2_init },
897#endif
882 { }
883};
884
885typedef int (*davinci_pll_init)(struct device *dev, void __iomem *base,
886 struct regmap *cfgchip);
887
888static int davinci_pll_probe(struct platform_device *pdev)
889{

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898 { }
899};
900
901typedef int (*davinci_pll_init)(struct device *dev, void __iomem *base,
902 struct regmap *cfgchip);
903
904static int davinci_pll_probe(struct platform_device *pdev)
905{

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