clk-fractional-divider.c (4e7cf74fa3b28fcb43531ca6bc350bf8636e3de6) clk-fractional-divider.c (82f53f9ee5770177eb102446cc3513bf07e2668a)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2014 Intel Corporation
4 *
5 * Adjustable fractional divider clock implementation.
6 * Output rate = (m / n) * parent_rate.
7 * Uses rational best approximation algorithm.
8 */

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71}
72
73void clk_fractional_divider_general_approximation(struct clk_hw *hw,
74 unsigned long rate,
75 unsigned long *parent_rate,
76 unsigned long *m, unsigned long *n)
77{
78 struct clk_fractional_divider *fd = to_clk_fd(hw);
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2014 Intel Corporation
4 *
5 * Adjustable fractional divider clock implementation.
6 * Output rate = (m / n) * parent_rate.
7 * Uses rational best approximation algorithm.
8 */

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71}
72
73void clk_fractional_divider_general_approximation(struct clk_hw *hw,
74 unsigned long rate,
75 unsigned long *parent_rate,
76 unsigned long *m, unsigned long *n)
77{
78 struct clk_fractional_divider *fd = to_clk_fd(hw);
79 unsigned long scale;
80
81 /*
82 * Get rate closer to *parent_rate to guarantee there is no overflow
83 * for m and n. In the result it will be the nearest rate left shifted
84 * by (scale - fd->nwidth) bits.
85 */
79
80 /*
81 * Get rate closer to *parent_rate to guarantee there is no overflow
82 * for m and n. In the result it will be the nearest rate left shifted
83 * by (scale - fd->nwidth) bits.
84 */
86 scale = fls_long(*parent_rate / rate - 1);
87 if (scale > fd->nwidth)
88 rate <<= scale - fd->nwidth;
85 if (fd->flags & CLK_FRAC_DIVIDER_POWER_OF_TWO_PS) {
86 unsigned long scale = fls_long(*parent_rate / rate - 1);
89
87
88 if (scale > fd->nwidth)
89 rate <<= scale - fd->nwidth;
90 }
91
90 rational_best_approximation(rate, *parent_rate,
91 GENMASK(fd->mwidth - 1, 0), GENMASK(fd->nwidth - 1, 0),
92 m, n);
93}
94
95static long clk_fd_round_rate(struct clk_hw *hw, unsigned long rate,
96 unsigned long *parent_rate)
97{

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92 rational_best_approximation(rate, *parent_rate,
93 GENMASK(fd->mwidth - 1, 0), GENMASK(fd->nwidth - 1, 0),
94 m, n);
95}
96
97static long clk_fd_round_rate(struct clk_hw *hw, unsigned long rate,
98 unsigned long *parent_rate)
99{

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