tpm_nsc.c (e5451c8f8330e03ad3cfa16048b4daf961af434f) tpm_nsc.c (8cfffc9d4d3786d3b496a021d7224e06328bac7d)
1/*
2 * Copyright (C) 2004 IBM Corporation
3 *
4 * Authors:
5 * Leendert van Doorn <leendert@watson.ibm.com>
6 * Dave Safford <safford@watson.ibm.com>
7 * Reiner Sailer <sailer@watson.ibm.com>
8 * Kylene Hall <kjhall@us.ibm.com>

--- 99 unchanged lines hidden (view full) ---

108 status = inb(chip->vendor.base + NSC_STATUS);
109 if (status & NSC_STATUS_OBF)
110 status = inb(chip->vendor.base + NSC_DATA);
111 if (status & NSC_STATUS_RDY)
112 return 0;
113 }
114 while (time_before(jiffies, stop));
115
1/*
2 * Copyright (C) 2004 IBM Corporation
3 *
4 * Authors:
5 * Leendert van Doorn <leendert@watson.ibm.com>
6 * Dave Safford <safford@watson.ibm.com>
7 * Reiner Sailer <sailer@watson.ibm.com>
8 * Kylene Hall <kjhall@us.ibm.com>

--- 99 unchanged lines hidden (view full) ---

108 status = inb(chip->vendor.base + NSC_STATUS);
109 if (status & NSC_STATUS_OBF)
110 status = inb(chip->vendor.base + NSC_DATA);
111 if (status & NSC_STATUS_RDY)
112 return 0;
113 }
114 while (time_before(jiffies, stop));
115
116 dev_info(chip->pdev, "wait for ready failed\n");
116 dev_info(&chip->dev, "wait for ready failed\n");
117 return -EBUSY;
118}
119
120
121static int tpm_nsc_recv(struct tpm_chip *chip, u8 * buf, size_t count)
122{
123 u8 *buffer = buf;
124 u8 data, *p;
125 u32 size;
126 __be32 *native_size;
127
128 if (count < 6)
129 return -EIO;
130
131 if (wait_for_stat(chip, NSC_STATUS_F0, NSC_STATUS_F0, &data) < 0) {
117 return -EBUSY;
118}
119
120
121static int tpm_nsc_recv(struct tpm_chip *chip, u8 * buf, size_t count)
122{
123 u8 *buffer = buf;
124 u8 data, *p;
125 u32 size;
126 __be32 *native_size;
127
128 if (count < 6)
129 return -EIO;
130
131 if (wait_for_stat(chip, NSC_STATUS_F0, NSC_STATUS_F0, &data) < 0) {
132 dev_err(chip->pdev, "F0 timeout\n");
132 dev_err(&chip->dev, "F0 timeout\n");
133 return -EIO;
134 }
135 if ((data =
136 inb(chip->vendor.base + NSC_DATA)) != NSC_COMMAND_NORMAL) {
133 return -EIO;
134 }
135 if ((data =
136 inb(chip->vendor.base + NSC_DATA)) != NSC_COMMAND_NORMAL) {
137 dev_err(chip->pdev, "not in normal mode (0x%x)\n",
137 dev_err(&chip->dev, "not in normal mode (0x%x)\n",
138 data);
139 return -EIO;
140 }
141
142 /* read the whole packet */
143 for (p = buffer; p < &buffer[count]; p++) {
144 if (wait_for_stat
145 (chip, NSC_STATUS_OBF, NSC_STATUS_OBF, &data) < 0) {
138 data);
139 return -EIO;
140 }
141
142 /* read the whole packet */
143 for (p = buffer; p < &buffer[count]; p++) {
144 if (wait_for_stat
145 (chip, NSC_STATUS_OBF, NSC_STATUS_OBF, &data) < 0) {
146 dev_err(chip->pdev,
146 dev_err(&chip->dev,
147 "OBF timeout (while reading data)\n");
148 return -EIO;
149 }
150 if (data & NSC_STATUS_F0)
151 break;
152 *p = inb(chip->vendor.base + NSC_DATA);
153 }
154
155 if ((data & NSC_STATUS_F0) == 0 &&
156 (wait_for_stat(chip, NSC_STATUS_F0, NSC_STATUS_F0, &data) < 0)) {
147 "OBF timeout (while reading data)\n");
148 return -EIO;
149 }
150 if (data & NSC_STATUS_F0)
151 break;
152 *p = inb(chip->vendor.base + NSC_DATA);
153 }
154
155 if ((data & NSC_STATUS_F0) == 0 &&
156 (wait_for_stat(chip, NSC_STATUS_F0, NSC_STATUS_F0, &data) < 0)) {
157 dev_err(chip->pdev, "F0 not set\n");
157 dev_err(&chip->dev, "F0 not set\n");
158 return -EIO;
159 }
160 if ((data = inb(chip->vendor.base + NSC_DATA)) != NSC_COMMAND_EOC) {
158 return -EIO;
159 }
160 if ((data = inb(chip->vendor.base + NSC_DATA)) != NSC_COMMAND_EOC) {
161 dev_err(chip->pdev,
161 dev_err(&chip->dev,
162 "expected end of command(0x%x)\n", data);
163 return -EIO;
164 }
165
166 native_size = (__force __be32 *) (buf + 2);
167 size = be32_to_cpu(*native_size);
168
169 if (count < size)

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184 * chart in the manual to the letter.
185 */
186 outb(NSC_COMMAND_CANCEL, chip->vendor.base + NSC_COMMAND);
187
188 if (nsc_wait_for_ready(chip) != 0)
189 return -EIO;
190
191 if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) {
162 "expected end of command(0x%x)\n", data);
163 return -EIO;
164 }
165
166 native_size = (__force __be32 *) (buf + 2);
167 size = be32_to_cpu(*native_size);
168
169 if (count < size)

--- 14 unchanged lines hidden (view full) ---

184 * chart in the manual to the letter.
185 */
186 outb(NSC_COMMAND_CANCEL, chip->vendor.base + NSC_COMMAND);
187
188 if (nsc_wait_for_ready(chip) != 0)
189 return -EIO;
190
191 if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) {
192 dev_err(chip->pdev, "IBF timeout\n");
192 dev_err(&chip->dev, "IBF timeout\n");
193 return -EIO;
194 }
195
196 outb(NSC_COMMAND_NORMAL, chip->vendor.base + NSC_COMMAND);
197 if (wait_for_stat(chip, NSC_STATUS_IBR, NSC_STATUS_IBR, &data) < 0) {
193 return -EIO;
194 }
195
196 outb(NSC_COMMAND_NORMAL, chip->vendor.base + NSC_COMMAND);
197 if (wait_for_stat(chip, NSC_STATUS_IBR, NSC_STATUS_IBR, &data) < 0) {
198 dev_err(chip->pdev, "IBR timeout\n");
198 dev_err(&chip->dev, "IBR timeout\n");
199 return -EIO;
200 }
201
202 for (i = 0; i < count; i++) {
203 if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) {
199 return -EIO;
200 }
201
202 for (i = 0; i < count; i++) {
203 if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) {
204 dev_err(chip->pdev,
204 dev_err(&chip->dev,
205 "IBF timeout (while writing data)\n");
206 return -EIO;
207 }
208 outb(buf[i], chip->vendor.base + NSC_DATA);
209 }
210
211 if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) {
205 "IBF timeout (while writing data)\n");
206 return -EIO;
207 }
208 outb(buf[i], chip->vendor.base + NSC_DATA);
209 }
210
211 if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) {
212 dev_err(chip->pdev, "IBF timeout\n");
212 dev_err(&chip->dev, "IBF timeout\n");
213 return -EIO;
214 }
215 outb(NSC_COMMAND_EOC, chip->vendor.base + NSC_COMMAND);
216
217 return count;
218}
219
220static void tpm_nsc_cancel(struct tpm_chip *chip)

--- 163 unchanged lines hidden --- 		213 return -EIO;
214 }
215 outb(NSC_COMMAND_EOC, chip->vendor.base + NSC_COMMAND);
216
217 return count;
218}
219
220static void tpm_nsc_cancel(struct tpm_chip *chip)

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