tpm_nsc.c (b4ed3e3cbb312869929cf4528d71e52629a6cacb) tpm_nsc.c (e659a3fe2027b19ecd8abb7ad79253672763454b)
1/*
2 * Copyright (C) 2004 IBM Corporation
3 *
4 * Authors:
5 * Leendert van Doorn <leendert@watson.ibm.com>
6 * Dave Safford <safford@watson.ibm.com>
7 * Reiner Sailer <sailer@watson.ibm.com>
8 * Kylene Hall <kjhall@us.ibm.com>

--- 97 unchanged lines hidden (view full) ---

106 status = inb(chip->vendor->base + NSC_STATUS);
107 if (status & NSC_STATUS_OBF)
108 status = inb(chip->vendor->base + NSC_DATA);
109 if (status & NSC_STATUS_RDY)
110 return 0;
111 }
112 while (time_before(jiffies, stop));
113
1/*
2 * Copyright (C) 2004 IBM Corporation
3 *
4 * Authors:
5 * Leendert van Doorn <leendert@watson.ibm.com>
6 * Dave Safford <safford@watson.ibm.com>
7 * Reiner Sailer <sailer@watson.ibm.com>
8 * Kylene Hall <kjhall@us.ibm.com>

--- 97 unchanged lines hidden (view full) ---

106 status = inb(chip->vendor->base + NSC_STATUS);
107 if (status & NSC_STATUS_OBF)
108 status = inb(chip->vendor->base + NSC_DATA);
109 if (status & NSC_STATUS_RDY)
110 return 0;
111 }
112 while (time_before(jiffies, stop));
113
114 dev_info(&chip->pci_dev->dev, "wait for ready failed\n");
114 dev_info(chip->dev, "wait for ready failed\n");
115 return -EBUSY;
116}
117
118
119static int tpm_nsc_recv(struct tpm_chip *chip, u8 * buf, size_t count)
120{
121 u8 *buffer = buf;
122 u8 data, *p;
123 u32 size;
124 __be32 *native_size;
125
126 if (count < 6)
127 return -EIO;
128
129 if (wait_for_stat(chip, NSC_STATUS_F0, NSC_STATUS_F0, &data) < 0) {
115 return -EBUSY;
116}
117
118
119static int tpm_nsc_recv(struct tpm_chip *chip, u8 * buf, size_t count)
120{
121 u8 *buffer = buf;
122 u8 data, *p;
123 u32 size;
124 __be32 *native_size;
125
126 if (count < 6)
127 return -EIO;
128
129 if (wait_for_stat(chip, NSC_STATUS_F0, NSC_STATUS_F0, &data) < 0) {
130 dev_err(&chip->pci_dev->dev, "F0 timeout\n");
130 dev_err(chip->dev, "F0 timeout\n");
131 return -EIO;
132 }
133 if ((data =
134 inb(chip->vendor->base + NSC_DATA)) != NSC_COMMAND_NORMAL) {
131 return -EIO;
132 }
133 if ((data =
134 inb(chip->vendor->base + NSC_DATA)) != NSC_COMMAND_NORMAL) {
135 dev_err(&chip->pci_dev->dev, "not in normal mode (0x%x)\n",
135 dev_err(chip->dev, "not in normal mode (0x%x)\n",
136 data);
137 return -EIO;
138 }
139
140 /* read the whole packet */
141 for (p = buffer; p < &buffer[count]; p++) {
142 if (wait_for_stat
143 (chip, NSC_STATUS_OBF, NSC_STATUS_OBF, &data) < 0) {
136 data);
137 return -EIO;
138 }
139
140 /* read the whole packet */
141 for (p = buffer; p < &buffer[count]; p++) {
142 if (wait_for_stat
143 (chip, NSC_STATUS_OBF, NSC_STATUS_OBF, &data) < 0) {
144 dev_err(&chip->pci_dev->dev,
144 dev_err(chip->dev,
145 "OBF timeout (while reading data)\n");
146 return -EIO;
147 }
148 if (data & NSC_STATUS_F0)
149 break;
150 *p = inb(chip->vendor->base + NSC_DATA);
151 }
152
153 if ((data & NSC_STATUS_F0) == 0 &&
154 (wait_for_stat(chip, NSC_STATUS_F0, NSC_STATUS_F0, &data) < 0)) {
145 "OBF timeout (while reading data)\n");
146 return -EIO;
147 }
148 if (data & NSC_STATUS_F0)
149 break;
150 *p = inb(chip->vendor->base + NSC_DATA);
151 }
152
153 if ((data & NSC_STATUS_F0) == 0 &&
154 (wait_for_stat(chip, NSC_STATUS_F0, NSC_STATUS_F0, &data) < 0)) {
155 dev_err(&chip->pci_dev->dev, "F0 not set\n");
155 dev_err(chip->dev, "F0 not set\n");
156 return -EIO;
157 }
158 if ((data = inb(chip->vendor->base + NSC_DATA)) != NSC_COMMAND_EOC) {
156 return -EIO;
157 }
158 if ((data = inb(chip->vendor->base + NSC_DATA)) != NSC_COMMAND_EOC) {
159 dev_err(&chip->pci_dev->dev,
159 dev_err(chip->dev,
160 "expected end of command(0x%x)\n", data);
161 return -EIO;
162 }
163
164 native_size = (__force __be32 *) (buf + 2);
165 size = be32_to_cpu(*native_size);
166
167 if (count < size)

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182 * chart in the manual to the letter.
183 */
184 outb(NSC_COMMAND_CANCEL, chip->vendor->base + NSC_COMMAND);
185
186 if (nsc_wait_for_ready(chip) != 0)
187 return -EIO;
188
189 if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) {
160 "expected end of command(0x%x)\n", data);
161 return -EIO;
162 }
163
164 native_size = (__force __be32 *) (buf + 2);
165 size = be32_to_cpu(*native_size);
166
167 if (count < size)

--- 14 unchanged lines hidden (view full) ---

182 * chart in the manual to the letter.
183 */
184 outb(NSC_COMMAND_CANCEL, chip->vendor->base + NSC_COMMAND);
185
186 if (nsc_wait_for_ready(chip) != 0)
187 return -EIO;
188
189 if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) {
190 dev_err(&chip->pci_dev->dev, "IBF timeout\n");
190 dev_err(chip->dev, "IBF timeout\n");
191 return -EIO;
192 }
193
194 outb(NSC_COMMAND_NORMAL, chip->vendor->base + NSC_COMMAND);
195 if (wait_for_stat(chip, NSC_STATUS_IBR, NSC_STATUS_IBR, &data) < 0) {
191 return -EIO;
192 }
193
194 outb(NSC_COMMAND_NORMAL, chip->vendor->base + NSC_COMMAND);
195 if (wait_for_stat(chip, NSC_STATUS_IBR, NSC_STATUS_IBR, &data) < 0) {
196 dev_err(&chip->pci_dev->dev, "IBR timeout\n");
196 dev_err(chip->dev, "IBR timeout\n");
197 return -EIO;
198 }
199
200 for (i = 0; i < count; i++) {
201 if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) {
197 return -EIO;
198 }
199
200 for (i = 0; i < count; i++) {
201 if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) {
202 dev_err(&chip->pci_dev->dev,
202 dev_err(chip->dev,
203 "IBF timeout (while writing data)\n");
204 return -EIO;
205 }
206 outb(buf[i], chip->vendor->base + NSC_DATA);
207 }
208
209 if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) {
203 "IBF timeout (while writing data)\n");
204 return -EIO;
205 }
206 outb(buf[i], chip->vendor->base + NSC_DATA);
207 }
208
209 if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) {
210 dev_err(&chip->pci_dev->dev, "IBF timeout\n");
210 dev_err(chip->dev, "IBF timeout\n");
211 return -EIO;
212 }
213 outb(NSC_COMMAND_EOC, chip->vendor->base + NSC_COMMAND);
214
215 return count;
216}
217
218static void tpm_nsc_cancel(struct tpm_chip *chip)

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320
321 dev_info(&pci_dev->dev,
322 "NSC TPM revision %d\n",
323 tpm_read_index(nscAddrBase, 0x27) & 0x1F);
324
325 /* enable the DPM module */
326 tpm_write_index(nscAddrBase, NSC_LDC_INDEX, 0x01);
327
211 return -EIO;
212 }
213 outb(NSC_COMMAND_EOC, chip->vendor->base + NSC_COMMAND);
214
215 return count;
216}
217
218static void tpm_nsc_cancel(struct tpm_chip *chip)

--- 101 unchanged lines hidden (view full) ---

320
321 dev_info(&pci_dev->dev,
322 "NSC TPM revision %d\n",
323 tpm_read_index(nscAddrBase, 0x27) & 0x1F);
324
325 /* enable the DPM module */
326 tpm_write_index(nscAddrBase, NSC_LDC_INDEX, 0x01);
327
328 if ((rc = tpm_register_hardware(pci_dev, &tpm_nsc)) < 0)
328 if ((rc = tpm_register_hardware(&pci_dev->dev, &tpm_nsc)) < 0)
329 goto out_err;
330
331 return 0;
332
333out_err:
334 pci_disable_device(pci_dev);
335 return rc;
336}
337
329 goto out_err;
330
331 return 0;
332
333out_err:
334 pci_disable_device(pci_dev);
335 return rc;
336}
337
338static void __devexit tpm_nsc_remove(struct pci_dev *pci_dev)
339{
340 struct tpm_chip *chip = pci_get_drvdata(pci_dev);
341
342 if ( chip )
343 tpm_remove_hardware(chip->dev);
344}
345
338static struct pci_device_id tpm_pci_tbl[] __devinitdata = {
339 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_0)},
340 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_12)},
341 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_0)},
342 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_12)},
343 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0)},
344 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_0)},
345 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1)},
346 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_0)},
347 {PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_LPC)},
348 {0,}
349};
350
351MODULE_DEVICE_TABLE(pci, tpm_pci_tbl);
352
353static struct pci_driver nsc_pci_driver = {
354 .name = "tpm_nsc",
355 .id_table = tpm_pci_tbl,
356 .probe = tpm_nsc_init,
346static struct pci_device_id tpm_pci_tbl[] __devinitdata = {
347 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_0)},
348 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_12)},
349 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_0)},
350 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_12)},
351 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0)},
352 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_0)},
353 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1)},
354 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_0)},
355 {PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_LPC)},
356 {0,}
357};
358
359MODULE_DEVICE_TABLE(pci, tpm_pci_tbl);
360
361static struct pci_driver nsc_pci_driver = {
362 .name = "tpm_nsc",
363 .id_table = tpm_pci_tbl,
364 .probe = tpm_nsc_init,
357 .remove = __devexit_p(tpm_remove),
365 .remove = __devexit_p(tpm_nsc_remove),
358 .suspend = tpm_pm_suspend,
359 .resume = tpm_pm_resume,
360};
361
362static int __init init_nsc(void)
363{
364 return pci_register_driver(&nsc_pci_driver);
365}

--- 13 unchanged lines hidden --- 		366 .suspend = tpm_pm_suspend,
367 .resume = tpm_pm_resume,
368};
369
370static int __init init_nsc(void)
371{
372 return pci_register_driver(&nsc_pci_driver);
373}

--- 13 unchanged lines hidden ---