tpm_nsc.c (700d8bdcd0fa815b08638b1e4d43b66d60cc6a8d) tpm_nsc.c (3122a88a242454efe72930e56a3e4d56ee534f3c)
1/*
2 * Copyright (C) 2004 IBM Corporation
3 *
4 * Authors:
5 * Leendert van Doorn <leendert@watson.ibm.com>
6 * Dave Safford <safford@watson.ibm.com>
7 * Reiner Sailer <sailer@watson.ibm.com>
8 * Kylene Hall <kjhall@us.ibm.com>

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17 * published by the Free Software Foundation, version 2 of the
18 * License.
19 *
20 */
21
22#include "tpm.h"
23
24/* National definitions */
1/*
2 * Copyright (C) 2004 IBM Corporation
3 *
4 * Authors:
5 * Leendert van Doorn <leendert@watson.ibm.com>
6 * Dave Safford <safford@watson.ibm.com>
7 * Reiner Sailer <sailer@watson.ibm.com>
8 * Kylene Hall <kjhall@us.ibm.com>

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17 * published by the Free Software Foundation, version 2 of the
18 * License.
19 *
20 */
21
22#include "tpm.h"
23
24/* National definitions */
25#define TPM_NSC_BASE 0x360
26#define TPM_NSC_IRQ 0x07
25enum tpm_nsc_addr {
26 TPM_NSC_BASE = 0x360,
27 TPM_NSC_IRQ = 0x07
28};
27
29
28#define NSC_LDN_INDEX 0x07
29#define NSC_SID_INDEX 0x20
30#define NSC_LDC_INDEX 0x30
31#define NSC_DIO_INDEX 0x60
32#define NSC_CIO_INDEX 0x62
33#define NSC_IRQ_INDEX 0x70
34#define NSC_ITS_INDEX 0x71
30enum tpm_nsc_index {
31 NSC_LDN_INDEX = 0x07,
32 NSC_SID_INDEX = 0x20,
33 NSC_LDC_INDEX = 0x30,
34 NSC_DIO_INDEX = 0x60,
35 NSC_CIO_INDEX = 0x62,
36 NSC_IRQ_INDEX = 0x70,
37 NSC_ITS_INDEX = 0x71
38};
35
39
36#define NSC_STATUS 0x01
37#define NSC_COMMAND 0x01
38#define NSC_DATA 0x00
40enum tpm_nsc_status_loc {
41 NSC_STATUS = 0x01,
42 NSC_COMMAND = 0x01,
43 NSC_DATA = 0x00
44};
39
40/* status bits */
45
46/* status bits */
41#define NSC_STATUS_OBF 0x01 /* output buffer full */
42#define NSC_STATUS_IBF 0x02 /* input buffer full */
43#define NSC_STATUS_F0 0x04 /* F0 */
44#define NSC_STATUS_A2 0x08 /* A2 */
45#define NSC_STATUS_RDY 0x10 /* ready to receive command */
46#define NSC_STATUS_IBR 0x20 /* ready to receive data */
47
47enum tpm_nsc_status{
48 NSC_STATUS_OBF = 0x01, /* output buffer full */
49 NSC_STATUS_IBF = 0x02, /* input buffer full */
50 NSC_STATUS_F0 = 0x04, /* F0 */
51 NSC_STATUS_A2 = 0x08, /* A2 */
52 NSC_STATUS_RDY = 0x10, /* ready to receive command */
53 NSC_STATUS_IBR = 0x20 /* ready to receive data */
54};
48/* command bits */
55/* command bits */
49#define NSC_COMMAND_NORMAL 0x01 /* normal mode */
50#define NSC_COMMAND_EOC 0x03
51#define NSC_COMMAND_CANCEL 0x22
52
56enum tpm_nsc_cmd_mode {
57 NSC_COMMAND_NORMAL = 0x01, /* normal mode */
58 NSC_COMMAND_EOC = 0x03,
59 NSC_COMMAND_CANCEL = 0x22
60};
53/*
54 * Wait for a certain status to appear
55 */
56static int wait_for_stat(struct tpm_chip *chip, u8 mask, u8 val, u8 * data)
57{
58 unsigned long stop;
59
60 /* status immediately available check */

--- 301 unchanged lines hidden --- 		61/*
62 * Wait for a certain status to appear
63 */
64static int wait_for_stat(struct tpm_chip *chip, u8 mask, u8 val, u8 * data)
65{
66 unsigned long stop;
67
68 /* status immediately available check */

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