tpm_nsc.c (3d5271f9883cba7b54762bc4fe027d4172f06db7) tpm_nsc.c (90dda520c1962d55a0e1d2571deed0d75fd6d6f1)
1/*
2 * Copyright (C) 2004 IBM Corporation
3 *
4 * Authors:
5 * Leendert van Doorn <leendert@watson.ibm.com>
6 * Dave Safford <safford@watson.ibm.com>
7 * Reiner Sailer <sailer@watson.ibm.com>
8 * Kylene Hall <kjhall@us.ibm.com>

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66/*
67 * Wait for a certain status to appear
68 */
69static int wait_for_stat(struct tpm_chip *chip, u8 mask, u8 val, u8 * data)
70{
71 unsigned long stop;
72
73 /* status immediately available check */
1/*
2 * Copyright (C) 2004 IBM Corporation
3 *
4 * Authors:
5 * Leendert van Doorn <leendert@watson.ibm.com>
6 * Dave Safford <safford@watson.ibm.com>
7 * Reiner Sailer <sailer@watson.ibm.com>
8 * Kylene Hall <kjhall@us.ibm.com>

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66/*
67 * Wait for a certain status to appear
68 */
69static int wait_for_stat(struct tpm_chip *chip, u8 mask, u8 val, u8 * data)
70{
71 unsigned long stop;
72
73 /* status immediately available check */
74 *data = inb(chip->vendor->base + NSC_STATUS);
74 *data = inb(chip->vendor.base + NSC_STATUS);
75 if ((*data & mask) == val)
76 return 0;
77
78 /* wait for status */
79 stop = jiffies + 10 * HZ;
80 do {
81 msleep(TPM_TIMEOUT);
75 if ((*data & mask) == val)
76 return 0;
77
78 /* wait for status */
79 stop = jiffies + 10 * HZ;
80 do {
81 msleep(TPM_TIMEOUT);
82 *data = inb(chip->vendor->base + 1);
82 *data = inb(chip->vendor.base + 1);
83 if ((*data & mask) == val)
84 return 0;
85 }
86 while (time_before(jiffies, stop));
87
88 return -EBUSY;
89}
90
91static int nsc_wait_for_ready(struct tpm_chip *chip)
92{
93 int status;
94 unsigned long stop;
95
96 /* status immediately available check */
83 if ((*data & mask) == val)
84 return 0;
85 }
86 while (time_before(jiffies, stop));
87
88 return -EBUSY;
89}
90
91static int nsc_wait_for_ready(struct tpm_chip *chip)
92{
93 int status;
94 unsigned long stop;
95
96 /* status immediately available check */
97 status = inb(chip->vendor->base + NSC_STATUS);
97 status = inb(chip->vendor.base + NSC_STATUS);
98 if (status & NSC_STATUS_OBF)
98 if (status & NSC_STATUS_OBF)
99 status = inb(chip->vendor->base + NSC_DATA);
99 status = inb(chip->vendor.base + NSC_DATA);
100 if (status & NSC_STATUS_RDY)
101 return 0;
102
103 /* wait for status */
104 stop = jiffies + 100;
105 do {
106 msleep(TPM_TIMEOUT);
100 if (status & NSC_STATUS_RDY)
101 return 0;
102
103 /* wait for status */
104 stop = jiffies + 100;
105 do {
106 msleep(TPM_TIMEOUT);
107 status = inb(chip->vendor->base + NSC_STATUS);
107 status = inb(chip->vendor.base + NSC_STATUS);
108 if (status & NSC_STATUS_OBF)
108 if (status & NSC_STATUS_OBF)
109 status = inb(chip->vendor->base + NSC_DATA);
109 status = inb(chip->vendor.base + NSC_DATA);
110 if (status & NSC_STATUS_RDY)
111 return 0;
112 }
113 while (time_before(jiffies, stop));
114
115 dev_info(chip->dev, "wait for ready failed\n");
116 return -EBUSY;
117}

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127 if (count < 6)
128 return -EIO;
129
130 if (wait_for_stat(chip, NSC_STATUS_F0, NSC_STATUS_F0, &data) < 0) {
131 dev_err(chip->dev, "F0 timeout\n");
132 return -EIO;
133 }
134 if ((data =
110 if (status & NSC_STATUS_RDY)
111 return 0;
112 }
113 while (time_before(jiffies, stop));
114
115 dev_info(chip->dev, "wait for ready failed\n");
116 return -EBUSY;
117}

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127 if (count < 6)
128 return -EIO;
129
130 if (wait_for_stat(chip, NSC_STATUS_F0, NSC_STATUS_F0, &data) < 0) {
131 dev_err(chip->dev, "F0 timeout\n");
132 return -EIO;
133 }
134 if ((data =
135 inb(chip->vendor->base + NSC_DATA)) != NSC_COMMAND_NORMAL) {
135 inb(chip->vendor.base + NSC_DATA)) != NSC_COMMAND_NORMAL) {
136 dev_err(chip->dev, "not in normal mode (0x%x)\n",
137 data);
138 return -EIO;
139 }
140
141 /* read the whole packet */
142 for (p = buffer; p < &buffer[count]; p++) {
143 if (wait_for_stat
144 (chip, NSC_STATUS_OBF, NSC_STATUS_OBF, &data) < 0) {
145 dev_err(chip->dev,
146 "OBF timeout (while reading data)\n");
147 return -EIO;
148 }
149 if (data & NSC_STATUS_F0)
150 break;
136 dev_err(chip->dev, "not in normal mode (0x%x)\n",
137 data);
138 return -EIO;
139 }
140
141 /* read the whole packet */
142 for (p = buffer; p < &buffer[count]; p++) {
143 if (wait_for_stat
144 (chip, NSC_STATUS_OBF, NSC_STATUS_OBF, &data) < 0) {
145 dev_err(chip->dev,
146 "OBF timeout (while reading data)\n");
147 return -EIO;
148 }
149 if (data & NSC_STATUS_F0)
150 break;
151 *p = inb(chip->vendor->base + NSC_DATA);
151 *p = inb(chip->vendor.base + NSC_DATA);
152 }
153
154 if ((data & NSC_STATUS_F0) == 0 &&
155 (wait_for_stat(chip, NSC_STATUS_F0, NSC_STATUS_F0, &data) < 0)) {
156 dev_err(chip->dev, "F0 not set\n");
157 return -EIO;
158 }
152 }
153
154 if ((data & NSC_STATUS_F0) == 0 &&
155 (wait_for_stat(chip, NSC_STATUS_F0, NSC_STATUS_F0, &data) < 0)) {
156 dev_err(chip->dev, "F0 not set\n");
157 return -EIO;
158 }
159 if ((data = inb(chip->vendor->base + NSC_DATA)) != NSC_COMMAND_EOC) {
159 if ((data = inb(chip->vendor.base + NSC_DATA)) != NSC_COMMAND_EOC) {
160 dev_err(chip->dev,
161 "expected end of command(0x%x)\n", data);
162 return -EIO;
163 }
164
165 native_size = (__force __be32 *) (buf + 2);
166 size = be32_to_cpu(*native_size);
167

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177 int i;
178
179 /*
180 * If we hit the chip with back to back commands it locks up
181 * and never set IBF. Hitting it with this "hammer" seems to
182 * fix it. Not sure why this is needed, we followed the flow
183 * chart in the manual to the letter.
184 */
160 dev_err(chip->dev,
161 "expected end of command(0x%x)\n", data);
162 return -EIO;
163 }
164
165 native_size = (__force __be32 *) (buf + 2);
166 size = be32_to_cpu(*native_size);
167

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177 int i;
178
179 /*
180 * If we hit the chip with back to back commands it locks up
181 * and never set IBF. Hitting it with this "hammer" seems to
182 * fix it. Not sure why this is needed, we followed the flow
183 * chart in the manual to the letter.
184 */
185 outb(NSC_COMMAND_CANCEL, chip->vendor->base + NSC_COMMAND);
185 outb(NSC_COMMAND_CANCEL, chip->vendor.base + NSC_COMMAND);
186
187 if (nsc_wait_for_ready(chip) != 0)
188 return -EIO;
189
190 if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) {
191 dev_err(chip->dev, "IBF timeout\n");
192 return -EIO;
193 }
194
186
187 if (nsc_wait_for_ready(chip) != 0)
188 return -EIO;
189
190 if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) {
191 dev_err(chip->dev, "IBF timeout\n");
192 return -EIO;
193 }
194
195 outb(NSC_COMMAND_NORMAL, chip->vendor->base + NSC_COMMAND);
195 outb(NSC_COMMAND_NORMAL, chip->vendor.base + NSC_COMMAND);
196 if (wait_for_stat(chip, NSC_STATUS_IBR, NSC_STATUS_IBR, &data) < 0) {
197 dev_err(chip->dev, "IBR timeout\n");
198 return -EIO;
199 }
200
201 for (i = 0; i < count; i++) {
202 if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) {
203 dev_err(chip->dev,
204 "IBF timeout (while writing data)\n");
205 return -EIO;
206 }
196 if (wait_for_stat(chip, NSC_STATUS_IBR, NSC_STATUS_IBR, &data) < 0) {
197 dev_err(chip->dev, "IBR timeout\n");
198 return -EIO;
199 }
200
201 for (i = 0; i < count; i++) {
202 if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) {
203 dev_err(chip->dev,
204 "IBF timeout (while writing data)\n");
205 return -EIO;
206 }
207 outb(buf[i], chip->vendor->base + NSC_DATA);
207 outb(buf[i], chip->vendor.base + NSC_DATA);
208 }
209
210 if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) {
211 dev_err(chip->dev, "IBF timeout\n");
212 return -EIO;
213 }
208 }
209
210 if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) {
211 dev_err(chip->dev, "IBF timeout\n");
212 return -EIO;
213 }
214 outb(NSC_COMMAND_EOC, chip->vendor->base + NSC_COMMAND);
214 outb(NSC_COMMAND_EOC, chip->vendor.base + NSC_COMMAND);
215
216 return count;
217}
218
219static void tpm_nsc_cancel(struct tpm_chip *chip)
220{
215
216 return count;
217}
218
219static void tpm_nsc_cancel(struct tpm_chip *chip)
220{
221 outb(NSC_COMMAND_CANCEL, chip->vendor->base + NSC_COMMAND);
221 outb(NSC_COMMAND_CANCEL, chip->vendor.base + NSC_COMMAND);
222}
223
224static u8 tpm_nsc_status(struct tpm_chip *chip)
225{
222}
223
224static u8 tpm_nsc_status(struct tpm_chip *chip)
225{
226 return inb(chip->vendor->base + NSC_STATUS);
226 return inb(chip->vendor.base + NSC_STATUS);
227}
228
229static struct file_operations nsc_ops = {
230 .owner = THIS_MODULE,
231 .llseek = no_llseek,
232 .open = tpm_open,
233 .read = tpm_read,
234 .write = tpm_write,

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263};
264
265static struct platform_device *pdev = NULL;
266
267static void __devexit tpm_nsc_remove(struct device *dev)
268{
269 struct tpm_chip *chip = dev_get_drvdata(dev);
270 if ( chip ) {
227}
228
229static struct file_operations nsc_ops = {
230 .owner = THIS_MODULE,
231 .llseek = no_llseek,
232 .open = tpm_open,
233 .read = tpm_read,
234 .write = tpm_write,

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263};
264
265static struct platform_device *pdev = NULL;
266
267static void __devexit tpm_nsc_remove(struct device *dev)
268{
269 struct tpm_chip *chip = dev_get_drvdata(dev);
270 if ( chip ) {
271 release_region(chip->vendor->base, 2);
271 release_region(chip->vendor.base, 2);
272 tpm_remove_hardware(chip->dev);
273 }
274}
275
276static struct device_driver nsc_drv = {
277 .name = "tpm_nsc",
278 .bus = &platform_bus_type,
279 .owner = THIS_MODULE,

--- 116 unchanged lines hidden --- 		272 tpm_remove_hardware(chip->dev);
273 }
274}
275
276static struct device_driver nsc_drv = {
277 .name = "tpm_nsc",
278 .bus = &platform_bus_type,
279 .owner = THIS_MODULE,

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