tpm_crb.c (422eac3f7deae34dbaffd08e03e27f37a5394a56) tpm_crb.c (9e0d39d8a6a0a8805d05fba22e3fbe80b5c8c4cb)
1/*
2 * Copyright (C) 2014 Intel Corporation
3 *
4 * Authors:
5 * Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
6 *
7 * Maintained by: <tpmdd-devel@lists.sourceforge.net>
8 *

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82 u8 __iomem *cmd;
83 u8 __iomem *rsp;
84};
85
86static SIMPLE_DEV_PM_OPS(crb_pm, tpm_pm_suspend, tpm_pm_resume);
87
88static u8 crb_status(struct tpm_chip *chip)
89{
1/*
2 * Copyright (C) 2014 Intel Corporation
3 *
4 * Authors:
5 * Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
6 *
7 * Maintained by: <tpmdd-devel@lists.sourceforge.net>
8 *

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82 u8 __iomem *cmd;
83 u8 __iomem *rsp;
84};
85
86static SIMPLE_DEV_PM_OPS(crb_pm, tpm_pm_suspend, tpm_pm_resume);
87
88static u8 crb_status(struct tpm_chip *chip)
89{
90 struct crb_priv *priv = chip->vendor.priv;
90 struct crb_priv *priv = dev_get_drvdata(&chip->dev);
91 u8 sts = 0;
92
93 if ((ioread32(&priv->cca->start) & CRB_START_INVOKE) !=
94 CRB_START_INVOKE)
95 sts |= CRB_STS_COMPLETE;
96
97 return sts;
98}
99
100static int crb_recv(struct tpm_chip *chip, u8 *buf, size_t count)
101{
91 u8 sts = 0;
92
93 if ((ioread32(&priv->cca->start) & CRB_START_INVOKE) !=
94 CRB_START_INVOKE)
95 sts |= CRB_STS_COMPLETE;
96
97 return sts;
98}
99
100static int crb_recv(struct tpm_chip *chip, u8 *buf, size_t count)
101{
102 struct crb_priv *priv = chip->vendor.priv;
102 struct crb_priv *priv = dev_get_drvdata(&chip->dev);
103 unsigned int expected;
104
105 /* sanity check */
106 if (count < 6)
107 return -EIO;
108
109 if (ioread32(&priv->cca->sts) & CRB_CA_STS_ERROR)
110 return -EIO;

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134 return -ENXIO;
135 rc = obj->integer.value == 0 ? 0 : -ENXIO;
136 ACPI_FREE(obj);
137 return rc;
138}
139
140static int crb_send(struct tpm_chip *chip, u8 *buf, size_t len)
141{
103 unsigned int expected;
104
105 /* sanity check */
106 if (count < 6)
107 return -EIO;
108
109 if (ioread32(&priv->cca->sts) & CRB_CA_STS_ERROR)
110 return -EIO;

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134 return -ENXIO;
135 rc = obj->integer.value == 0 ? 0 : -ENXIO;
136 ACPI_FREE(obj);
137 return rc;
138}
139
140static int crb_send(struct tpm_chip *chip, u8 *buf, size_t len)
141{
142 struct crb_priv *priv = chip->vendor.priv;
142 struct crb_priv *priv = dev_get_drvdata(&chip->dev);
143 int rc = 0;
144
145 if (len > ioread32(&priv->cca->cmd_size)) {
146 dev_err(&chip->dev,
147 "invalid command count value %x %zx\n",
148 (unsigned int) len,
149 (size_t) ioread32(&priv->cca->cmd_size));
150 return -E2BIG;

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161 if (priv->flags & CRB_FL_ACPI_START)
162 rc = crb_do_acpi_start(chip);
163
164 return rc;
165}
166
167static void crb_cancel(struct tpm_chip *chip)
168{
143 int rc = 0;
144
145 if (len > ioread32(&priv->cca->cmd_size)) {
146 dev_err(&chip->dev,
147 "invalid command count value %x %zx\n",
148 (unsigned int) len,
149 (size_t) ioread32(&priv->cca->cmd_size));
150 return -E2BIG;

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161 if (priv->flags & CRB_FL_ACPI_START)
162 rc = crb_do_acpi_start(chip);
163
164 return rc;
165}
166
167static void crb_cancel(struct tpm_chip *chip)
168{
169 struct crb_priv *priv = chip->vendor.priv;
169 struct crb_priv *priv = dev_get_drvdata(&chip->dev);
170
171 iowrite32(cpu_to_le32(CRB_CANCEL_INVOKE), &priv->cca->cancel);
172
173 /* Make sure that cmd is populated before issuing cancel. */
174 wmb();
175
176 if ((priv->flags & CRB_FL_ACPI_START) && crb_do_acpi_start(chip))
177 dev_err(&chip->dev, "ACPI Start failed\n");
178
179 iowrite32(0, &priv->cca->cancel);
180}
181
182static bool crb_req_canceled(struct tpm_chip *chip, u8 status)
183{
170
171 iowrite32(cpu_to_le32(CRB_CANCEL_INVOKE), &priv->cca->cancel);
172
173 /* Make sure that cmd is populated before issuing cancel. */
174 wmb();
175
176 if ((priv->flags & CRB_FL_ACPI_START) && crb_do_acpi_start(chip))
177 dev_err(&chip->dev, "ACPI Start failed\n");
178
179 iowrite32(0, &priv->cca->cancel);
180}
181
182static bool crb_req_canceled(struct tpm_chip *chip, u8 status)
183{
184 struct crb_priv *priv = chip->vendor.priv;
184 struct crb_priv *priv = dev_get_drvdata(&chip->dev);
185 u32 cancel = ioread32(&priv->cca->cancel);
186
187 return (cancel & CRB_CANCEL_INVOKE) == CRB_CANCEL_INVOKE;
188}
189
190static const struct tpm_class_ops tpm_crb = {
191 .status = crb_status,
192 .recv = crb_recv,

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201{
202 struct tpm_chip *chip;
203 int rc;
204
205 chip = tpmm_chip_alloc(&device->dev, &tpm_crb);
206 if (IS_ERR(chip))
207 return PTR_ERR(chip);
208
185 u32 cancel = ioread32(&priv->cca->cancel);
186
187 return (cancel & CRB_CANCEL_INVOKE) == CRB_CANCEL_INVOKE;
188}
189
190static const struct tpm_class_ops tpm_crb = {
191 .status = crb_status,
192 .recv = crb_recv,

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201{
202 struct tpm_chip *chip;
203 int rc;
204
205 chip = tpmm_chip_alloc(&device->dev, &tpm_crb);
206 if (IS_ERR(chip))
207 return PTR_ERR(chip);
208
209 chip->vendor.priv = priv;
209 dev_set_drvdata(&chip->dev, priv);
210 chip->acpi_dev_handle = device->handle;
211 chip->flags = TPM_CHIP_FLAG_TPM2;
212
213 rc = tpm_get_timeouts(chip);
214 if (rc)
215 return rc;
216
217 rc = tpm2_do_selftest(chip);

--- 177 unchanged lines hidden --- 		210 chip->acpi_dev_handle = device->handle;
211 chip->flags = TPM_CHIP_FLAG_TPM2;
212
213 rc = tpm_get_timeouts(chip);
214 if (rc)
215 return rc;
216
217 rc = tpm2_do_selftest(chip);

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