sunxi-rsb.c (4a0dbc12e61823ece7172df953c3333c8f5f9222) sunxi-rsb.c (3c15e00e7b58bc2b37e53d2612f0a0163281be77)
1/*
2 * RSB (Reduced Serial Bus) driver.
3 *
4 * Author: Chen-Yu Tsai <wens@csie.org>
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.

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40#include <linux/interrupt.h>
41#include <linux/io.h>
42#include <linux/iopoll.h>
43#include <linux/module.h>
44#include <linux/of.h>
45#include <linux/of_irq.h>
46#include <linux/of_platform.h>
47#include <linux/platform_device.h>
1/*
2 * RSB (Reduced Serial Bus) driver.
3 *
4 * Author: Chen-Yu Tsai <wens@csie.org>
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.

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40#include <linux/interrupt.h>
41#include <linux/io.h>
42#include <linux/iopoll.h>
43#include <linux/module.h>
44#include <linux/of.h>
45#include <linux/of_irq.h>
46#include <linux/of_platform.h>
47#include <linux/platform_device.h>
48#include <linux/pm.h>
49#include <linux/pm_runtime.h>
50#include <linux/regmap.h>
51#include <linux/reset.h>
52#include <linux/slab.h>
53#include <linux/sunxi-rsb.h>
54#include <linux/types.h>
55
56/* RSB registers */
57#define RSB_CTRL 0x0 /* Global control */

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123struct sunxi_rsb {
124 struct device *dev;
125 void __iomem *regs;
126 struct clk *clk;
127 struct reset_control *rstc;
128 struct completion complete;
129 struct mutex lock;
130 unsigned int status;
48#include <linux/regmap.h>
49#include <linux/reset.h>
50#include <linux/slab.h>
51#include <linux/sunxi-rsb.h>
52#include <linux/types.h>
53
54/* RSB registers */
55#define RSB_CTRL 0x0 /* Global control */

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121struct sunxi_rsb {
122 struct device *dev;
123 void __iomem *regs;
124 struct clk *clk;
125 struct reset_control *rstc;
126 struct completion complete;
127 struct mutex lock;
128 unsigned int status;
131 u32 clk_freq;
132};
133
134/* bus / slave device related functions */
135static struct bus_type sunxi_rsb_bus;
136
137static int sunxi_rsb_device_match(struct device *dev, struct device_driver *drv)
138{
139 return of_driver_match_device(dev, drv);

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168
169 return drv->probe(rdev);
170}
171
172static int sunxi_rsb_device_remove(struct device *dev)
173{
174 const struct sunxi_rsb_driver *drv = to_sunxi_rsb_driver(dev->driver);
175
129};
130
131/* bus / slave device related functions */
132static struct bus_type sunxi_rsb_bus;
133
134static int sunxi_rsb_device_match(struct device *dev, struct device_driver *drv)
135{
136 return of_driver_match_device(dev, drv);

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165
166 return drv->probe(rdev);
167}
168
169static int sunxi_rsb_device_remove(struct device *dev)
170{
171 const struct sunxi_rsb_driver *drv = to_sunxi_rsb_driver(dev->driver);
172
176 return drv->remove(to_sunxi_rsb_device(dev));
173 drv->remove(to_sunxi_rsb_device(dev));
174
175 return 0;
177}
178
179static struct bus_type sunxi_rsb_bus = {
180 .name = RSB_CTRL_NAME,
181 .match = sunxi_rsb_device_match,
182 .probe = sunxi_rsb_device_probe,
183 .remove = sunxi_rsb_device_remove,
184 .uevent = of_device_uevent_modalias,

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333 case 4:
334 cmd = RSB_CMD_RD32;
335 break;
336 default:
337 dev_err(rsb->dev, "Invalid access width: %zd\n", len);
338 return -EINVAL;
339 }
340
176}
177
178static struct bus_type sunxi_rsb_bus = {
179 .name = RSB_CTRL_NAME,
180 .match = sunxi_rsb_device_match,
181 .probe = sunxi_rsb_device_probe,
182 .remove = sunxi_rsb_device_remove,
183 .uevent = of_device_uevent_modalias,

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332 case 4:
333 cmd = RSB_CMD_RD32;
334 break;
335 default:
336 dev_err(rsb->dev, "Invalid access width: %zd\n", len);
337 return -EINVAL;
338 }
339
341 ret = pm_runtime_resume_and_get(rsb->dev);
342 if (ret)
343 return ret;
344
345 mutex_lock(&rsb->lock);
346
347 writel(addr, rsb->regs + RSB_ADDR);
348 writel(RSB_DAR_RTA(rtaddr), rsb->regs + RSB_DAR);
349 writel(cmd, rsb->regs + RSB_CMD);
350
351 ret = _sunxi_rsb_run_xfer(rsb);
352 if (ret)
353 goto unlock;
354
355 *buf = readl(rsb->regs + RSB_DATA) & GENMASK(len * 8 - 1, 0);
356
357unlock:
358 mutex_unlock(&rsb->lock);
359
340 mutex_lock(&rsb->lock);
341
342 writel(addr, rsb->regs + RSB_ADDR);
343 writel(RSB_DAR_RTA(rtaddr), rsb->regs + RSB_DAR);
344 writel(cmd, rsb->regs + RSB_CMD);
345
346 ret = _sunxi_rsb_run_xfer(rsb);
347 if (ret)
348 goto unlock;
349
350 *buf = readl(rsb->regs + RSB_DATA) & GENMASK(len * 8 - 1, 0);
351
352unlock:
353 mutex_unlock(&rsb->lock);
354
360 pm_runtime_mark_last_busy(rsb->dev);
361 pm_runtime_put_autosuspend(rsb->dev);
362
363 return ret;
364}
365
366static int sunxi_rsb_write(struct sunxi_rsb *rsb, u8 rtaddr, u8 addr,
367 const u32 *buf, size_t len)
368{
369 u32 cmd;
370 int ret;

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382 case 4:
383 cmd = RSB_CMD_WR32;
384 break;
385 default:
386 dev_err(rsb->dev, "Invalid access width: %zd\n", len);
387 return -EINVAL;
388 }
389
355 return ret;
356}
357
358static int sunxi_rsb_write(struct sunxi_rsb *rsb, u8 rtaddr, u8 addr,
359 const u32 *buf, size_t len)
360{
361 u32 cmd;
362 int ret;

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374 case 4:
375 cmd = RSB_CMD_WR32;
376 break;
377 default:
378 dev_err(rsb->dev, "Invalid access width: %zd\n", len);
379 return -EINVAL;
380 }
381
390 ret = pm_runtime_resume_and_get(rsb->dev);
391 if (ret)
392 return ret;
393
394 mutex_lock(&rsb->lock);
395
396 writel(addr, rsb->regs + RSB_ADDR);
397 writel(RSB_DAR_RTA(rtaddr), rsb->regs + RSB_DAR);
398 writel(*buf, rsb->regs + RSB_DATA);
399 writel(cmd, rsb->regs + RSB_CMD);
400 ret = _sunxi_rsb_run_xfer(rsb);
401
402 mutex_unlock(&rsb->lock);
403
382 mutex_lock(&rsb->lock);
383
384 writel(addr, rsb->regs + RSB_ADDR);
385 writel(RSB_DAR_RTA(rtaddr), rsb->regs + RSB_DAR);
386 writel(*buf, rsb->regs + RSB_DATA);
387 writel(cmd, rsb->regs + RSB_CMD);
388 ret = _sunxi_rsb_run_xfer(rsb);
389
390 mutex_unlock(&rsb->lock);
391
404 pm_runtime_mark_last_busy(rsb->dev);
405 pm_runtime_put_autosuspend(rsb->dev);
406
407 return ret;
408}
409
410/* RSB regmap functions */
411struct sunxi_rsb_ctx {
412 struct sunxi_rsb_device *rdev;
413 int size;
414};

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626 if (IS_ERR(rdev))
627 dev_err(dev, "failed to add child device %pOF: %ld\n",
628 child, PTR_ERR(rdev));
629 }
630
631 return 0;
632}
633
392 return ret;
393}
394
395/* RSB regmap functions */
396struct sunxi_rsb_ctx {
397 struct sunxi_rsb_device *rdev;
398 int size;
399};

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611 if (IS_ERR(rdev))
612 dev_err(dev, "failed to add child device %pOF: %ld\n",
613 child, PTR_ERR(rdev));
614 }
615
616 return 0;
617}
618
634static int sunxi_rsb_hw_init(struct sunxi_rsb *rsb)
635{
636 struct device *dev = rsb->dev;
637 unsigned long p_clk_freq;
638 u32 clk_delay, reg;
639 int clk_div, ret;
619static const struct of_device_id sunxi_rsb_of_match_table[] = {
620 { .compatible = "allwinner,sun8i-a23-rsb" },
621 {}
622};
623MODULE_DEVICE_TABLE(of, sunxi_rsb_of_match_table);
640
624
641 ret = clk_prepare_enable(rsb->clk);
642 if (ret) {
643 dev_err(dev, "failed to enable clk: %d\n", ret);
644 return ret;
645 }
646
647 ret = reset_control_deassert(rsb->rstc);
648 if (ret) {
649 dev_err(dev, "failed to deassert reset line: %d\n", ret);
650 goto err_clk_disable;
651 }
652
653 /* reset the controller */
654 writel(RSB_CTRL_SOFT_RST, rsb->regs + RSB_CTRL);
655 readl_poll_timeout(rsb->regs + RSB_CTRL, reg,
656 !(reg & RSB_CTRL_SOFT_RST), 1000, 100000);
657
658 /*
659 * Clock frequency and delay calculation code is from
660 * Allwinner U-boot sources.
661 *
662 * From A83 user manual:
663 * bus clock frequency = parent clock frequency / (2 * (divider + 1))
664 */
665 p_clk_freq = clk_get_rate(rsb->clk);
666 clk_div = p_clk_freq / rsb->clk_freq / 2;
667 if (!clk_div)
668 clk_div = 1;
669 else if (clk_div > RSB_CCR_MAX_CLK_DIV + 1)
670 clk_div = RSB_CCR_MAX_CLK_DIV + 1;
671
672 clk_delay = clk_div >> 1;
673 if (!clk_delay)
674 clk_delay = 1;
675
676 dev_info(dev, "RSB running at %lu Hz\n", p_clk_freq / clk_div / 2);
677 writel(RSB_CCR_SDA_OUT_DELAY(clk_delay) | RSB_CCR_CLK_DIV(clk_div - 1),
678 rsb->regs + RSB_CCR);
679
680 return 0;
681
682err_clk_disable:
683 clk_disable_unprepare(rsb->clk);
684
685 return ret;
686}
687
688static void sunxi_rsb_hw_exit(struct sunxi_rsb *rsb)
689{
690 /* Keep the clock and PM reference counts consistent. */
691 if (pm_runtime_status_suspended(rsb->dev))
692 pm_runtime_resume(rsb->dev);
693 reset_control_assert(rsb->rstc);
694 clk_disable_unprepare(rsb->clk);
695}
696
697static int __maybe_unused sunxi_rsb_runtime_suspend(struct device *dev)
698{
699 struct sunxi_rsb *rsb = dev_get_drvdata(dev);
700
701 clk_disable_unprepare(rsb->clk);
702
703 return 0;
704}
705
706static int __maybe_unused sunxi_rsb_runtime_resume(struct device *dev)
707{
708 struct sunxi_rsb *rsb = dev_get_drvdata(dev);
709
710 return clk_prepare_enable(rsb->clk);
711}
712
713static int __maybe_unused sunxi_rsb_suspend(struct device *dev)
714{
715 struct sunxi_rsb *rsb = dev_get_drvdata(dev);
716
717 sunxi_rsb_hw_exit(rsb);
718
719 return 0;
720}
721
722static int __maybe_unused sunxi_rsb_resume(struct device *dev)
723{
724 struct sunxi_rsb *rsb = dev_get_drvdata(dev);
725
726 return sunxi_rsb_hw_init(rsb);
727}
728
729static int sunxi_rsb_probe(struct platform_device *pdev)
730{
731 struct device *dev = &pdev->dev;
732 struct device_node *np = dev->of_node;
733 struct resource *r;
734 struct sunxi_rsb *rsb;
625static int sunxi_rsb_probe(struct platform_device *pdev)
626{
627 struct device *dev = &pdev->dev;
628 struct device_node *np = dev->of_node;
629 struct resource *r;
630 struct sunxi_rsb *rsb;
735 u32 clk_freq = 3000000;
736 int irq, ret;
631 unsigned long p_clk_freq;
632 u32 clk_delay, clk_freq = 3000000;
633 int clk_div, irq, ret;
634 u32 reg;
737
738 of_property_read_u32(np, "clock-frequency", &clk_freq);
739 if (clk_freq > RSB_MAX_FREQ) {
740 dev_err(dev,
741 "clock-frequency (%u Hz) is too high (max = 20MHz)\n",
742 clk_freq);
743 return -EINVAL;
744 }
745
746 rsb = devm_kzalloc(dev, sizeof(*rsb), GFP_KERNEL);
747 if (!rsb)
748 return -ENOMEM;
749
750 rsb->dev = dev;
635
636 of_property_read_u32(np, "clock-frequency", &clk_freq);
637 if (clk_freq > RSB_MAX_FREQ) {
638 dev_err(dev,
639 "clock-frequency (%u Hz) is too high (max = 20MHz)\n",
640 clk_freq);
641 return -EINVAL;
642 }
643
644 rsb = devm_kzalloc(dev, sizeof(*rsb), GFP_KERNEL);
645 if (!rsb)
646 return -ENOMEM;
647
648 rsb->dev = dev;
751 rsb->clk_freq = clk_freq;
752 platform_set_drvdata(pdev, rsb);
753 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
754 rsb->regs = devm_ioremap_resource(dev, r);
755 if (IS_ERR(rsb->regs))
756 return PTR_ERR(rsb->regs);
757
758 irq = platform_get_irq(pdev, 0);
759 if (irq < 0)
760 return irq;
761
762 rsb->clk = devm_clk_get(dev, NULL);
763 if (IS_ERR(rsb->clk)) {
764 ret = PTR_ERR(rsb->clk);
765 dev_err(dev, "failed to retrieve clk: %d\n", ret);
766 return ret;
767 }
768
649 platform_set_drvdata(pdev, rsb);
650 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
651 rsb->regs = devm_ioremap_resource(dev, r);
652 if (IS_ERR(rsb->regs))
653 return PTR_ERR(rsb->regs);
654
655 irq = platform_get_irq(pdev, 0);
656 if (irq < 0)
657 return irq;
658
659 rsb->clk = devm_clk_get(dev, NULL);
660 if (IS_ERR(rsb->clk)) {
661 ret = PTR_ERR(rsb->clk);
662 dev_err(dev, "failed to retrieve clk: %d\n", ret);
663 return ret;
664 }
665
666 ret = clk_prepare_enable(rsb->clk);
667 if (ret) {
668 dev_err(dev, "failed to enable clk: %d\n", ret);
669 return ret;
670 }
671
672 p_clk_freq = clk_get_rate(rsb->clk);
673
769 rsb->rstc = devm_reset_control_get(dev, NULL);
770 if (IS_ERR(rsb->rstc)) {
771 ret = PTR_ERR(rsb->rstc);
772 dev_err(dev, "failed to retrieve reset controller: %d\n", ret);
674 rsb->rstc = devm_reset_control_get(dev, NULL);
675 if (IS_ERR(rsb->rstc)) {
676 ret = PTR_ERR(rsb->rstc);
677 dev_err(dev, "failed to retrieve reset controller: %d\n", ret);
773 return ret;
678 goto err_clk_disable;
774 }
775
679 }
680
681 ret = reset_control_deassert(rsb->rstc);
682 if (ret) {
683 dev_err(dev, "failed to deassert reset line: %d\n", ret);
684 goto err_clk_disable;
685 }
686
776 init_completion(&rsb->complete);
777 mutex_init(&rsb->lock);
778
687 init_completion(&rsb->complete);
688 mutex_init(&rsb->lock);
689
690 /* reset the controller */
691 writel(RSB_CTRL_SOFT_RST, rsb->regs + RSB_CTRL);
692 readl_poll_timeout(rsb->regs + RSB_CTRL, reg,
693 !(reg & RSB_CTRL_SOFT_RST), 1000, 100000);
694
695 /*
696 * Clock frequency and delay calculation code is from
697 * Allwinner U-boot sources.
698 *
699 * From A83 user manual:
700 * bus clock frequency = parent clock frequency / (2 * (divider + 1))
701 */
702 clk_div = p_clk_freq / clk_freq / 2;
703 if (!clk_div)
704 clk_div = 1;
705 else if (clk_div > RSB_CCR_MAX_CLK_DIV + 1)
706 clk_div = RSB_CCR_MAX_CLK_DIV + 1;
707
708 clk_delay = clk_div >> 1;
709 if (!clk_delay)
710 clk_delay = 1;
711
712 dev_info(dev, "RSB running at %lu Hz\n", p_clk_freq / clk_div / 2);
713 writel(RSB_CCR_SDA_OUT_DELAY(clk_delay) | RSB_CCR_CLK_DIV(clk_div - 1),
714 rsb->regs + RSB_CCR);
715
779 ret = devm_request_irq(dev, irq, sunxi_rsb_irq, 0, RSB_CTRL_NAME, rsb);
780 if (ret) {
781 dev_err(dev, "can't register interrupt handler irq %d: %d\n",
782 irq, ret);
716 ret = devm_request_irq(dev, irq, sunxi_rsb_irq, 0, RSB_CTRL_NAME, rsb);
717 if (ret) {
718 dev_err(dev, "can't register interrupt handler irq %d: %d\n",
719 irq, ret);
783 return ret;
720 goto err_reset_assert;
784 }
785
721 }
722
786 ret = sunxi_rsb_hw_init(rsb);
787 if (ret)
788 return ret;
789
790 /* initialize all devices on the bus into RSB mode */
791 ret = sunxi_rsb_init_device_mode(rsb);
792 if (ret)
793 dev_warn(dev, "Initialize device mode failed: %d\n", ret);
794
723 /* initialize all devices on the bus into RSB mode */
724 ret = sunxi_rsb_init_device_mode(rsb);
725 if (ret)
726 dev_warn(dev, "Initialize device mode failed: %d\n", ret);
727
795 pm_suspend_ignore_children(dev, true);
796 pm_runtime_set_active(dev);
797 pm_runtime_set_autosuspend_delay(dev, MSEC_PER_SEC);
798 pm_runtime_use_autosuspend(dev);
799 pm_runtime_enable(dev);
800
801 of_rsb_register_devices(rsb);
802
803 return 0;
728 of_rsb_register_devices(rsb);
729
730 return 0;
731
732err_reset_assert:
733 reset_control_assert(rsb->rstc);
734
735err_clk_disable:
736 clk_disable_unprepare(rsb->clk);
737
738 return ret;
804}
805
806static int sunxi_rsb_remove(struct platform_device *pdev)
807{
808 struct sunxi_rsb *rsb = platform_get_drvdata(pdev);
809
810 device_for_each_child(rsb->dev, NULL, sunxi_rsb_remove_devices);
739}
740
741static int sunxi_rsb_remove(struct platform_device *pdev)
742{
743 struct sunxi_rsb *rsb = platform_get_drvdata(pdev);
744
745 device_for_each_child(rsb->dev, NULL, sunxi_rsb_remove_devices);
811 pm_runtime_disable(&pdev->dev);
812 sunxi_rsb_hw_exit(rsb);
746 reset_control_assert(rsb->rstc);
747 clk_disable_unprepare(rsb->clk);
813
814 return 0;
815}
816
748
749 return 0;
750}
751
817static void sunxi_rsb_shutdown(struct platform_device *pdev)
818{
819 struct sunxi_rsb *rsb = platform_get_drvdata(pdev);
820
821 pm_runtime_disable(&pdev->dev);
822 sunxi_rsb_hw_exit(rsb);
823}
824
825static const struct dev_pm_ops sunxi_rsb_dev_pm_ops = {
826 SET_RUNTIME_PM_OPS(sunxi_rsb_runtime_suspend,
827 sunxi_rsb_runtime_resume, NULL)
828 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sunxi_rsb_suspend, sunxi_rsb_resume)
829};
830
831static const struct of_device_id sunxi_rsb_of_match_table[] = {
832 { .compatible = "allwinner,sun8i-a23-rsb" },
833 {}
834};
835MODULE_DEVICE_TABLE(of, sunxi_rsb_of_match_table);
836
837static struct platform_driver sunxi_rsb_driver = {
838 .probe = sunxi_rsb_probe,
839 .remove = sunxi_rsb_remove,
752static struct platform_driver sunxi_rsb_driver = {
753 .probe = sunxi_rsb_probe,
754 .remove = sunxi_rsb_remove,
840 .shutdown = sunxi_rsb_shutdown,
841 .driver = {
842 .name = RSB_CTRL_NAME,
843 .of_match_table = sunxi_rsb_of_match_table,
755 .driver = {
756 .name = RSB_CTRL_NAME,
757 .of_match_table = sunxi_rsb_of_match_table,
844 .pm = &sunxi_rsb_dev_pm_ops,
845 },
846};
847
848static int __init sunxi_rsb_init(void)
849{
850 int ret;
851
852 ret = bus_register(&sunxi_rsb_bus);

--- 19 unchanged lines hidden --- 		758 },
759};
760
761static int __init sunxi_rsb_init(void)
762{
763 int ret;
764
765 ret = bus_register(&sunxi_rsb_bus);

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