imx-weim.c (597473720f4dc69749542bfcfed4a927a43d935e) imx-weim.c (77266e722feabb6eefc8a7e84ac2415837d91c5f)
1/*
2 * EIM driver for Freescale's i.MX chips
3 *
4 * Copyright (C) 2013 Freescale Semiconductor, Inc.
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.

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14#include <linux/mfd/syscon.h>
15#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
16#include <linux/regmap.h>
17
18struct imx_weim_devtype {
19 unsigned int cs_count;
20 unsigned int cs_regs_count;
21 unsigned int cs_stride;
1/*
2 * EIM driver for Freescale's i.MX chips
3 *
4 * Copyright (C) 2013 Freescale Semiconductor, Inc.
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.

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14#include <linux/mfd/syscon.h>
15#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
16#include <linux/regmap.h>
17
18struct imx_weim_devtype {
19 unsigned int cs_count;
20 unsigned int cs_regs_count;
21 unsigned int cs_stride;
22 unsigned int wcr_offset;
23 unsigned int wcr_bcm;
22};
23
24static const struct imx_weim_devtype imx1_weim_devtype = {
25 .cs_count = 6,
26 .cs_regs_count = 2,
27 .cs_stride = 0x08,
28};
29
30static const struct imx_weim_devtype imx27_weim_devtype = {
31 .cs_count = 6,
32 .cs_regs_count = 3,
33 .cs_stride = 0x10,
34};
35
36static const struct imx_weim_devtype imx50_weim_devtype = {
37 .cs_count = 4,
38 .cs_regs_count = 6,
39 .cs_stride = 0x18,
24};
25
26static const struct imx_weim_devtype imx1_weim_devtype = {
27 .cs_count = 6,
28 .cs_regs_count = 2,
29 .cs_stride = 0x08,
30};
31
32static const struct imx_weim_devtype imx27_weim_devtype = {
33 .cs_count = 6,
34 .cs_regs_count = 3,
35 .cs_stride = 0x10,
36};
37
38static const struct imx_weim_devtype imx50_weim_devtype = {
39 .cs_count = 4,
40 .cs_regs_count = 6,
41 .cs_stride = 0x18,
42 .wcr_offset = 0x90,
43 .wcr_bcm = BIT(0),
40};
41
42static const struct imx_weim_devtype imx51_weim_devtype = {
43 .cs_count = 6,
44 .cs_regs_count = 6,
45 .cs_stride = 0x18,
46};
47

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187 void __iomem *base)
188{
189 const struct of_device_id *of_id = of_match_device(weim_id_table,
190 &pdev->dev);
191 const struct imx_weim_devtype *devtype = of_id->data;
192 struct device_node *child;
193 int ret, have_child = 0;
194 struct cs_timing_state ts = {};
44};
45
46static const struct imx_weim_devtype imx51_weim_devtype = {
47 .cs_count = 6,
48 .cs_regs_count = 6,
49 .cs_stride = 0x18,
50};
51

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191 void __iomem *base)
192{
193 const struct of_device_id *of_id = of_match_device(weim_id_table,
194 &pdev->dev);
195 const struct imx_weim_devtype *devtype = of_id->data;
196 struct device_node *child;
197 int ret, have_child = 0;
198 struct cs_timing_state ts = {};
199 u32 reg;
195
196 if (devtype == &imx50_weim_devtype) {
197 ret = imx_weim_gpr_setup(pdev);
198 if (ret)
199 return ret;
200 }
201
200
201 if (devtype == &imx50_weim_devtype) {
202 ret = imx_weim_gpr_setup(pdev);
203 if (ret)
204 return ret;
205 }
206
207 if (of_property_read_bool(pdev->dev.of_node, "fsl,burst-clk-enable")) {
208 if (devtype->wcr_bcm) {
209 reg = readl(base + devtype->wcr_offset);
210 writel(reg | devtype->wcr_bcm,
211 base + devtype->wcr_offset);
212 } else {
213 dev_err(&pdev->dev, "burst clk mode not supported.\n");
214 return -EINVAL;
215 }
216 }
217
202 for_each_available_child_of_node(pdev->dev.of_node, child) {
203 ret = weim_timing_setup(&pdev->dev, child, base, devtype, &ts);
204 if (ret)
205 dev_warn(&pdev->dev, "%pOF set timing failed.\n",
206 child);
207 else
208 have_child = 1;
209 }

--- 53 unchanged lines hidden --- 		218 for_each_available_child_of_node(pdev->dev.of_node, child) {
219 ret = weim_timing_setup(&pdev->dev, child, base, devtype, &ts);
220 if (ret)
221 dev_warn(&pdev->dev, "%pOF set timing failed.\n",
222 child);
223 else
224 have_child = 1;
225 }

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