bt1-axi.c (4b4193256c8d3bc3a5397b5cd9494c2ad386317d) bt1-axi.c (5e93207e962a6d23893ff4405f6c5d4396fb5934)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2020 BAIKAL ELECTRONICS, JSC
4 *
5 * Authors:
6 * Serge Semin <Sergey.Semin@baikalelectronics.ru>
7 *
8 * Baikal-T1 AXI-bus driver

--- 121 unchanged lines hidden (view full) ---

130 return PTR_ERR_OR_ZERO(axi->qos_regs);
131}
132
133static int bt1_axi_request_rst(struct bt1_axi *axi)
134{
135 int ret;
136
137 axi->arst = devm_reset_control_get_optional_exclusive(axi->dev, "arst");
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2020 BAIKAL ELECTRONICS, JSC
4 *
5 * Authors:
6 * Serge Semin <Sergey.Semin@baikalelectronics.ru>
7 *
8 * Baikal-T1 AXI-bus driver

--- 121 unchanged lines hidden (view full) ---

130 return PTR_ERR_OR_ZERO(axi->qos_regs);
131}
132
133static int bt1_axi_request_rst(struct bt1_axi *axi)
134{
135 int ret;
136
137 axi->arst = devm_reset_control_get_optional_exclusive(axi->dev, "arst");
138 if (IS_ERR(axi->arst)) {
139 dev_warn(axi->dev, "Couldn't get reset control line\n");
140 return PTR_ERR(axi->arst);
141 }
138 if (IS_ERR(axi->arst))
139 return dev_err_probe(axi->dev, PTR_ERR(axi->arst),
140 "Couldn't get reset control line\n");
142
143 ret = reset_control_deassert(axi->arst);
144 if (ret)
145 dev_err(axi->dev, "Failed to deassert the reset line\n");
146
147 return ret;
148}
149

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154 clk_disable_unprepare(axi->aclk);
155}
156
157static int bt1_axi_request_clk(struct bt1_axi *axi)
158{
159 int ret;
160
161 axi->aclk = devm_clk_get(axi->dev, "aclk");
141
142 ret = reset_control_deassert(axi->arst);
143 if (ret)
144 dev_err(axi->dev, "Failed to deassert the reset line\n");
145
146 return ret;
147}
148

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153 clk_disable_unprepare(axi->aclk);
154}
155
156static int bt1_axi_request_clk(struct bt1_axi *axi)
157{
158 int ret;
159
160 axi->aclk = devm_clk_get(axi->dev, "aclk");
162 if (IS_ERR(axi->aclk)) {
163 dev_err(axi->dev, "Couldn't get AXI Interconnect clock\n");
164 return PTR_ERR(axi->aclk);
165 }
161 if (IS_ERR(axi->aclk))
162 return dev_err_probe(axi->dev, PTR_ERR(axi->aclk),
163 "Couldn't get AXI Interconnect clock\n");
166
167 ret = clk_prepare_enable(axi->aclk);
168 if (ret) {
169 dev_err(axi->dev, "Couldn't enable the AXI clock\n");
170 return ret;
171 }
172
173 ret = devm_add_action_or_reset(axi->dev, bt1_axi_disable_clk, axi);

--- 141 unchanged lines hidden ---
164
165 ret = clk_prepare_enable(axi->aclk);
166 if (ret) {
167 dev_err(axi->dev, "Couldn't enable the AXI clock\n");
168 return ret;
169 }
170
171 ret = devm_add_action_or_reset(axi->dev, bt1_axi_disable_clk, axi);

--- 141 unchanged lines hidden ---