nfit.h (4ce7796632a13d252f9c11b84342cc2d35903536) nfit.h (a1facc1fffc17a65e2c12a8de7434b9325ec0324)
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * NVDIMM Firmware Interface Table - NFIT
4 *
5 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
6 */
7#ifndef __NFIT_H__
8#define __NFIT_H__
9#include <linux/workqueue.h>
10#include <linux/libnvdimm.h>
11#include <linux/ndctl.h>
12#include <linux/types.h>
13#include <linux/acpi.h>
14#include <acpi/acuuid.h>
15
16/* ACPI 6.1 */
17#define UUID_NFIT_BUS "2f10e7a4-9e91-11e4-89d3-123b93f75cba"
18
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * NVDIMM Firmware Interface Table - NFIT
4 *
5 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
6 */
7#ifndef __NFIT_H__
8#define __NFIT_H__
9#include <linux/workqueue.h>
10#include <linux/libnvdimm.h>
11#include <linux/ndctl.h>
12#include <linux/types.h>
13#include <linux/acpi.h>
14#include <acpi/acuuid.h>
15
16/* ACPI 6.1 */
17#define UUID_NFIT_BUS "2f10e7a4-9e91-11e4-89d3-123b93f75cba"
18
19/* https://pmem.io/documents/NVDIMM_DSM_Interface-V1.6.pdf */
19/* http://pmem.io/documents/NVDIMM_DSM_Interface-V1.6.pdf */
20#define UUID_NFIT_DIMM "4309ac30-0d11-11e4-9191-0800200c9a66"
20#define UUID_NFIT_DIMM "4309ac30-0d11-11e4-9191-0800200c9a66"
21#define UUID_INTEL_BUS "c7d8acd4-2df8-4b82-9f65-a325335af149"
21
22/* https://github.com/HewlettPackard/hpe-nvm/blob/master/Documentation/ */
23#define UUID_NFIT_DIMM_N_HPE1 "9002c334-acf3-4c0e-9642-a235f0d53bc6"
24#define UUID_NFIT_DIMM_N_HPE2 "5008664b-b758-41a0-a03c-27c2f2d04f7e"
25
26/* https://msdn.microsoft.com/library/windows/hardware/mt604741 */
27#define UUID_NFIT_DIMM_N_MSFT "1ee68b36-d4bd-4a1a-9a16-4f8e53d46e05"
28
29/* http://www.uefi.org/RFIC_LIST (see "Virtual NVDIMM 0x1901") */
30#define UUID_NFIT_DIMM_N_HYPERV "5746c5f2-a9a2-4264-ad0e-e4ddc9e09e80"
31
32#define ACPI_NFIT_MEM_FAILED_MASK (ACPI_NFIT_MEM_SAVE_FAILED \
33 | ACPI_NFIT_MEM_RESTORE_FAILED | ACPI_NFIT_MEM_FLUSH_FAILED \
34 | ACPI_NFIT_MEM_NOT_ARMED | ACPI_NFIT_MEM_MAP_FAILED)
35
22
23/* https://github.com/HewlettPackard/hpe-nvm/blob/master/Documentation/ */
24#define UUID_NFIT_DIMM_N_HPE1 "9002c334-acf3-4c0e-9642-a235f0d53bc6"
25#define UUID_NFIT_DIMM_N_HPE2 "5008664b-b758-41a0-a03c-27c2f2d04f7e"
26
27/* https://msdn.microsoft.com/library/windows/hardware/mt604741 */
28#define UUID_NFIT_DIMM_N_MSFT "1ee68b36-d4bd-4a1a-9a16-4f8e53d46e05"
29
30/* http://www.uefi.org/RFIC_LIST (see "Virtual NVDIMM 0x1901") */
31#define UUID_NFIT_DIMM_N_HYPERV "5746c5f2-a9a2-4264-ad0e-e4ddc9e09e80"
32
33#define ACPI_NFIT_MEM_FAILED_MASK (ACPI_NFIT_MEM_SAVE_FAILED \
34 | ACPI_NFIT_MEM_RESTORE_FAILED | ACPI_NFIT_MEM_FLUSH_FAILED \
35 | ACPI_NFIT_MEM_NOT_ARMED | ACPI_NFIT_MEM_MAP_FAILED)
36
36#define NVDIMM_FAMILY_MAX NVDIMM_FAMILY_HYPERV
37#define NVDIMM_CMD_MAX 31
38
39#define NVDIMM_STANDARD_CMDMASK \
40(1 << ND_CMD_SMART | 1 << ND_CMD_SMART_THRESHOLD | 1 << ND_CMD_DIMM_FLAGS \
41 | 1 << ND_CMD_GET_CONFIG_SIZE | 1 << ND_CMD_GET_CONFIG_DATA \
42 | 1 << ND_CMD_SET_CONFIG_DATA | 1 << ND_CMD_VENDOR_EFFECT_LOG_SIZE \
43 | 1 << ND_CMD_VENDOR_EFFECT_LOG | 1 << ND_CMD_VENDOR)
44

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61 NVDIMM_INTEL_DISABLE_PASSPHRASE = 21,
62 NVDIMM_INTEL_UNLOCK_UNIT = 22,
63 NVDIMM_INTEL_FREEZE_LOCK = 23,
64 NVDIMM_INTEL_SECURE_ERASE = 24,
65 NVDIMM_INTEL_OVERWRITE = 25,
66 NVDIMM_INTEL_QUERY_OVERWRITE = 26,
67 NVDIMM_INTEL_SET_MASTER_PASSPHRASE = 27,
68 NVDIMM_INTEL_MASTER_SECURE_ERASE = 28,
37#define NVDIMM_CMD_MAX 31
38
39#define NVDIMM_STANDARD_CMDMASK \
40(1 << ND_CMD_SMART | 1 << ND_CMD_SMART_THRESHOLD | 1 << ND_CMD_DIMM_FLAGS \
41 | 1 << ND_CMD_GET_CONFIG_SIZE | 1 << ND_CMD_GET_CONFIG_DATA \
42 | 1 << ND_CMD_SET_CONFIG_DATA | 1 << ND_CMD_VENDOR_EFFECT_LOG_SIZE \
43 | 1 << ND_CMD_VENDOR_EFFECT_LOG | 1 << ND_CMD_VENDOR)
44

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61 NVDIMM_INTEL_DISABLE_PASSPHRASE = 21,
62 NVDIMM_INTEL_UNLOCK_UNIT = 22,
63 NVDIMM_INTEL_FREEZE_LOCK = 23,
64 NVDIMM_INTEL_SECURE_ERASE = 24,
65 NVDIMM_INTEL_OVERWRITE = 25,
66 NVDIMM_INTEL_QUERY_OVERWRITE = 26,
67 NVDIMM_INTEL_SET_MASTER_PASSPHRASE = 27,
68 NVDIMM_INTEL_MASTER_SECURE_ERASE = 28,
69 NVDIMM_INTEL_FW_ACTIVATE_DIMMINFO = 29,
70 NVDIMM_INTEL_FW_ACTIVATE_ARM = 30,
69};
70
71};
72
73enum nvdimm_bus_family_cmds {
74 NVDIMM_BUS_INTEL_FW_ACTIVATE_BUSINFO = 1,
75 NVDIMM_BUS_INTEL_FW_ACTIVATE = 2,
76};
77
71#define NVDIMM_INTEL_SECURITY_CMDMASK \
72(1 << NVDIMM_INTEL_GET_SECURITY_STATE | 1 << NVDIMM_INTEL_SET_PASSPHRASE \
73| 1 << NVDIMM_INTEL_DISABLE_PASSPHRASE | 1 << NVDIMM_INTEL_UNLOCK_UNIT \
74| 1 << NVDIMM_INTEL_FREEZE_LOCK | 1 << NVDIMM_INTEL_SECURE_ERASE \
75| 1 << NVDIMM_INTEL_OVERWRITE | 1 << NVDIMM_INTEL_QUERY_OVERWRITE \
76| 1 << NVDIMM_INTEL_SET_MASTER_PASSPHRASE \
77| 1 << NVDIMM_INTEL_MASTER_SECURE_ERASE)
78
78#define NVDIMM_INTEL_SECURITY_CMDMASK \
79(1 << NVDIMM_INTEL_GET_SECURITY_STATE | 1 << NVDIMM_INTEL_SET_PASSPHRASE \
80| 1 << NVDIMM_INTEL_DISABLE_PASSPHRASE | 1 << NVDIMM_INTEL_UNLOCK_UNIT \
81| 1 << NVDIMM_INTEL_FREEZE_LOCK | 1 << NVDIMM_INTEL_SECURE_ERASE \
82| 1 << NVDIMM_INTEL_OVERWRITE | 1 << NVDIMM_INTEL_QUERY_OVERWRITE \
83| 1 << NVDIMM_INTEL_SET_MASTER_PASSPHRASE \
84| 1 << NVDIMM_INTEL_MASTER_SECURE_ERASE)
85
86#define NVDIMM_INTEL_FW_ACTIVATE_CMDMASK \
87(1 << NVDIMM_INTEL_FW_ACTIVATE_DIMMINFO | 1 << NVDIMM_INTEL_FW_ACTIVATE_ARM)
88
89#define NVDIMM_BUS_INTEL_FW_ACTIVATE_CMDMASK \
90(1 << NVDIMM_BUS_INTEL_FW_ACTIVATE_BUSINFO | 1 << NVDIMM_BUS_INTEL_FW_ACTIVATE)
91
79#define NVDIMM_INTEL_CMDMASK \
80(NVDIMM_STANDARD_CMDMASK | 1 << NVDIMM_INTEL_GET_MODES \
81 | 1 << NVDIMM_INTEL_GET_FWINFO | 1 << NVDIMM_INTEL_START_FWUPDATE \
82 | 1 << NVDIMM_INTEL_SEND_FWUPDATE | 1 << NVDIMM_INTEL_FINISH_FWUPDATE \
83 | 1 << NVDIMM_INTEL_QUERY_FWUPDATE | 1 << NVDIMM_INTEL_SET_THRESHOLD \
84 | 1 << NVDIMM_INTEL_INJECT_ERROR | 1 << NVDIMM_INTEL_LATCH_SHUTDOWN \
92#define NVDIMM_INTEL_CMDMASK \
93(NVDIMM_STANDARD_CMDMASK | 1 << NVDIMM_INTEL_GET_MODES \
94 | 1 << NVDIMM_INTEL_GET_FWINFO | 1 << NVDIMM_INTEL_START_FWUPDATE \
95 | 1 << NVDIMM_INTEL_SEND_FWUPDATE | 1 << NVDIMM_INTEL_FINISH_FWUPDATE \
96 | 1 << NVDIMM_INTEL_QUERY_FWUPDATE | 1 << NVDIMM_INTEL_SET_THRESHOLD \
97 | 1 << NVDIMM_INTEL_INJECT_ERROR | 1 << NVDIMM_INTEL_LATCH_SHUTDOWN \
85 | NVDIMM_INTEL_SECURITY_CMDMASK)
98 | NVDIMM_INTEL_SECURITY_CMDMASK | NVDIMM_INTEL_FW_ACTIVATE_CMDMASK)
86
99
100#define NVDIMM_INTEL_DENY_CMDMASK \
101(NVDIMM_INTEL_SECURITY_CMDMASK | NVDIMM_INTEL_FW_ACTIVATE_CMDMASK)
102
87enum nfit_uuids {
88 /* for simplicity alias the uuid index with the family id */
89 NFIT_DEV_DIMM = NVDIMM_FAMILY_INTEL,
90 NFIT_DEV_DIMM_N_HPE1 = NVDIMM_FAMILY_HPE1,
91 NFIT_DEV_DIMM_N_HPE2 = NVDIMM_FAMILY_HPE2,
92 NFIT_DEV_DIMM_N_MSFT = NVDIMM_FAMILY_MSFT,
93 NFIT_DEV_DIMM_N_HYPERV = NVDIMM_FAMILY_HYPERV,
103enum nfit_uuids {
104 /* for simplicity alias the uuid index with the family id */
105 NFIT_DEV_DIMM = NVDIMM_FAMILY_INTEL,
106 NFIT_DEV_DIMM_N_HPE1 = NVDIMM_FAMILY_HPE1,
107 NFIT_DEV_DIMM_N_HPE2 = NVDIMM_FAMILY_HPE2,
108 NFIT_DEV_DIMM_N_MSFT = NVDIMM_FAMILY_MSFT,
109 NFIT_DEV_DIMM_N_HYPERV = NVDIMM_FAMILY_HYPERV,
110 /*
111 * to_nfit_bus_uuid() expects to translate bus uuid family ids
112 * to a UUID index using NVDIMM_FAMILY_MAX as an offset
113 */
114 NFIT_BUS_INTEL = NVDIMM_FAMILY_MAX + NVDIMM_BUS_FAMILY_INTEL,
94 NFIT_SPA_VOLATILE,
95 NFIT_SPA_PM,
96 NFIT_SPA_DCR,
97 NFIT_SPA_BDW,
98 NFIT_SPA_VDISK,
99 NFIT_SPA_VCD,
100 NFIT_SPA_PDISK,
101 NFIT_SPA_PCD,

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194 struct acpi_nfit_system_address *spa_bdw;
195 struct acpi_nfit_interleave *idt_dcr;
196 struct acpi_nfit_interleave *idt_bdw;
197 struct kernfs_node *flags_attr;
198 struct nfit_flush *nfit_flush;
199 struct list_head list;
200 struct acpi_device *adev;
201 struct acpi_nfit_desc *acpi_desc;
115 NFIT_SPA_VOLATILE,
116 NFIT_SPA_PM,
117 NFIT_SPA_DCR,
118 NFIT_SPA_BDW,
119 NFIT_SPA_VDISK,
120 NFIT_SPA_VCD,
121 NFIT_SPA_PDISK,
122 NFIT_SPA_PCD,

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215 struct acpi_nfit_system_address *spa_bdw;
216 struct acpi_nfit_interleave *idt_dcr;
217 struct acpi_nfit_interleave *idt_bdw;
218 struct kernfs_node *flags_attr;
219 struct nfit_flush *nfit_flush;
220 struct list_head list;
221 struct acpi_device *adev;
222 struct acpi_nfit_desc *acpi_desc;
223 enum nvdimm_fwa_state fwa_state;
224 enum nvdimm_fwa_result fwa_result;
225 int fwa_count;
202 char id[NFIT_DIMM_ID_LEN+1];
203 struct resource *flush_wpq;
204 unsigned long dsm_mask;
205 unsigned long flags;
206 u32 dirty_shutdown;
207 int family;
208};
209

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233 struct list_head list;
234 struct kernfs_node *scrub_count_state;
235 unsigned int max_ars;
236 unsigned int scrub_count;
237 unsigned int scrub_mode;
238 unsigned long scrub_flags;
239 unsigned long dimm_cmd_force_en;
240 unsigned long bus_cmd_force_en;
226 char id[NFIT_DIMM_ID_LEN+1];
227 struct resource *flush_wpq;
228 unsigned long dsm_mask;
229 unsigned long flags;
230 u32 dirty_shutdown;
231 int family;
232};
233

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257 struct list_head list;
258 struct kernfs_node *scrub_count_state;
259 unsigned int max_ars;
260 unsigned int scrub_count;
261 unsigned int scrub_mode;
262 unsigned long scrub_flags;
263 unsigned long dimm_cmd_force_en;
264 unsigned long bus_cmd_force_en;
241 unsigned long bus_nfit_cmd_force_en;
265 unsigned long bus_dsm_mask;
266 unsigned long family_dsm_mask[NVDIMM_BUS_FAMILY_MAX + 1];
242 unsigned int platform_cap;
243 unsigned int scrub_tmo;
244 int (*blk_do_io)(struct nd_blk_region *ndbr, resource_size_t dpa,
245 void *iobuf, u64 len, int rw);
267 unsigned int platform_cap;
268 unsigned int scrub_tmo;
269 int (*blk_do_io)(struct nd_blk_region *ndbr, resource_size_t dpa,
270 void *iobuf, u64 len, int rw);
271 enum nvdimm_fwa_state fwa_state;
272 enum nvdimm_fwa_capability fwa_cap;
273 int fwa_count;
274 bool fwa_noidle;
275 bool fwa_nosuspend;
246};
247
248enum scrub_mode {
249 HW_ERROR_SCRUB_OFF,
250 HW_ERROR_SCRUB_ON,
251};
252
253enum nd_blk_mmio_selector {

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340const guid_t *to_nfit_uuid(enum nfit_uuids id);
341int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, void *nfit, acpi_size sz);
342void acpi_nfit_shutdown(void *data);
343void __acpi_nfit_notify(struct device *dev, acpi_handle handle, u32 event);
344void __acpi_nvdimm_notify(struct device *dev, u32 event);
345int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm,
346 unsigned int cmd, void *buf, unsigned int buf_len, int *cmd_rc);
347void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev);
276};
277
278enum scrub_mode {
279 HW_ERROR_SCRUB_OFF,
280 HW_ERROR_SCRUB_ON,
281};
282
283enum nd_blk_mmio_selector {

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370const guid_t *to_nfit_uuid(enum nfit_uuids id);
371int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, void *nfit, acpi_size sz);
372void acpi_nfit_shutdown(void *data);
373void __acpi_nfit_notify(struct device *dev, acpi_handle handle, u32 event);
374void __acpi_nvdimm_notify(struct device *dev, u32 event);
375int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm,
376 unsigned int cmd, void *buf, unsigned int buf_len, int *cmd_rc);
377void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev);
378bool intel_fwa_supported(struct nvdimm_bus *nvdimm_bus);
379extern struct device_attribute dev_attr_firmware_activate_noidle;
348#endif /* __NFIT_H__ */
380#endif /* __NFIT_H__ */