ivpu_drv.h (b7ed87ffc7341d108bc0ce14b15f8546eca4aa50) | ivpu_drv.h (52ab5be191c42fe1bffac97ee248a237b9712889) |
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1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Copyright (C) 2020-2024 Intel Corporation 4 */ 5 6#ifndef __IVPU_DRV_H__ 7#define __IVPU_DRV_H__ 8 --- 18 unchanged lines hidden (view full) --- 27#define PCI_DEVICE_ID_ARL 0xad1d 28#define PCI_DEVICE_ID_LNL 0x643e 29 30#define IVPU_HW_IP_37XX 37 31#define IVPU_HW_IP_40XX 40 32#define IVPU_HW_IP_50XX 50 33#define IVPU_HW_IP_60XX 60 34 | 1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Copyright (C) 2020-2024 Intel Corporation 4 */ 5 6#ifndef __IVPU_DRV_H__ 7#define __IVPU_DRV_H__ 8 --- 18 unchanged lines hidden (view full) --- 27#define PCI_DEVICE_ID_ARL 0xad1d 28#define PCI_DEVICE_ID_LNL 0x643e 29 30#define IVPU_HW_IP_37XX 37 31#define IVPU_HW_IP_40XX 40 32#define IVPU_HW_IP_50XX 50 33#define IVPU_HW_IP_60XX 60 34 |
35#define IVPU_HW_IP_REV_LNL_B0 4 36 |
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35#define IVPU_HW_BTRS_MTL 1 36#define IVPU_HW_BTRS_LNL 2 37 38#define IVPU_GLOBAL_CONTEXT_MMU_SSID 0 39/* SSID 1 is used by the VPU to represent reserved context */ 40#define IVPU_RESERVED_CONTEXT_MMU_SSID 1 41#define IVPU_USER_CONTEXT_MIN_SSID 2 42#define IVPU_USER_CONTEXT_MAX_SSID (IVPU_USER_CONTEXT_MIN_SSID + 63) --- 234 unchanged lines hidden --- | 37#define IVPU_HW_BTRS_MTL 1 38#define IVPU_HW_BTRS_LNL 2 39 40#define IVPU_GLOBAL_CONTEXT_MMU_SSID 0 41/* SSID 1 is used by the VPU to represent reserved context */ 42#define IVPU_RESERVED_CONTEXT_MMU_SSID 1 43#define IVPU_USER_CONTEXT_MIN_SSID 2 44#define IVPU_USER_CONTEXT_MAX_SSID (IVPU_USER_CONTEXT_MIN_SSID + 63) --- 234 unchanged lines hidden --- |