ivpu_drv.h (3bf3e21c15d4386a5f15118ec39bbc1b67ea5759) ivpu_drv.h (3b434a3445fff3149128db0169da864d67057325)
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (C) 2020-2023 Intel Corporation
4 */
5
6#ifndef __IVPU_DRV_H__
7#define __IVPU_DRV_H__
8
9#include <drm/drm_device.h>
10#include <drm/drm_drv.h>
11#include <drm/drm_managed.h>
12#include <drm/drm_mm.h>
13#include <drm/drm_print.h>
14
15#include <linux/pci.h>
16#include <linux/xarray.h>
17#include <uapi/drm/ivpu_accel.h>
18
19#include "ivpu_mmu_context.h"
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (C) 2020-2023 Intel Corporation
4 */
5
6#ifndef __IVPU_DRV_H__
7#define __IVPU_DRV_H__
8
9#include <drm/drm_device.h>
10#include <drm/drm_drv.h>
11#include <drm/drm_managed.h>
12#include <drm/drm_mm.h>
13#include <drm/drm_print.h>
14
15#include <linux/pci.h>
16#include <linux/xarray.h>
17#include <uapi/drm/ivpu_accel.h>
18
19#include "ivpu_mmu_context.h"
20#include "ivpu_ipc.h"
20
21#define DRIVER_NAME "intel_vpu"
22#define DRIVER_DESC "Driver for Intel NPU (Neural Processing Unit)"
23#define DRIVER_DATE "20230117"
24
25#define PCI_DEVICE_ID_MTL 0x7d1d
26#define PCI_DEVICE_ID_ARL 0xad1d
27#define PCI_DEVICE_ID_LNL 0x643e

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115 struct ivpu_mmu_context rctx;
116 struct xarray context_xa;
117 struct xa_limit context_xa_limit;
118
119 struct mutex bo_list_lock; /* Protects bo_list */
120 struct list_head bo_list;
121
122 struct xarray submitted_jobs_xa;
21
22#define DRIVER_NAME "intel_vpu"
23#define DRIVER_DESC "Driver for Intel NPU (Neural Processing Unit)"
24#define DRIVER_DATE "20230117"
25
26#define PCI_DEVICE_ID_MTL 0x7d1d
27#define PCI_DEVICE_ID_ARL 0xad1d
28#define PCI_DEVICE_ID_LNL 0x643e

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116 struct ivpu_mmu_context rctx;
117 struct xarray context_xa;
118 struct xa_limit context_xa_limit;
119
120 struct mutex bo_list_lock; /* Protects bo_list */
121 struct list_head bo_list;
122
123 struct xarray submitted_jobs_xa;
123 struct task_struct *job_done_thread;
124 struct ivpu_ipc_consumer job_done_consumer;
124
125 atomic64_t unique_id_counter;
126
127 struct {
128 int boot;
129 int jsm;
130 int tdr;
131 int reschedule_suspend;

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125
126 atomic64_t unique_id_counter;
127
128 struct {
129 int boot;
130 int jsm;
131 int tdr;
132 int reschedule_suspend;

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