cache.h (c39f2d9db0fd81ea20bb5cce9b3f082ca63753e2) cache.h (7af710d988775aadf440222ecbe0c10eecf3eb54)
1/*
2 * include/asm-xtensa/cache.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * (C) 2001 - 2005 Tensilica Inc.

--- 17 unchanged lines hidden (view full) ---

26#if DCACHE_WAY_SIZE >= ICACHE_WAY_SIZE
27# define CACHE_WAY_SIZE DCACHE_WAY_SIZE
28#else
29# define CACHE_WAY_SIZE ICACHE_WAY_SIZE
30#endif
31
32#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
33
1/*
2 * include/asm-xtensa/cache.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * (C) 2001 - 2005 Tensilica Inc.

--- 17 unchanged lines hidden (view full) ---

26#if DCACHE_WAY_SIZE >= ICACHE_WAY_SIZE
27# define CACHE_WAY_SIZE DCACHE_WAY_SIZE
28#else
29# define CACHE_WAY_SIZE ICACHE_WAY_SIZE
30#endif
31
32#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
33
34/*
35 * R/O after init is actually writable, it cannot go to .rodata
36 * according to vmlinux linker script.
37 */
38#define __ro_after_init __read_mostly
39
34#endif /* _XTENSA_CACHE_H */
40#endif /* _XTENSA_CACHE_H */