scattered.c (47f10a36003eaf493125a5e6687dd1ff775bfd8c) scattered.c (47bdf3378d62a627cfb8a54e1180c08d67078b61)
1/*
2 * Routines to identify additional cpu features that are scattered in
3 * cpuid space.
4 */
5#include <linux/cpu.h>
6
7#include <asm/pat.h>
8#include <asm/processor.h>
9
10#include <asm/apic.h>
11
12struct cpuid_bit {
13 u16 feature;
14 u8 reg;
15 u8 bit;
16 u32 level;
17 u32 sub_leaf;
18};
19
1/*
2 * Routines to identify additional cpu features that are scattered in
3 * cpuid space.
4 */
5#include <linux/cpu.h>
6
7#include <asm/pat.h>
8#include <asm/processor.h>
9
10#include <asm/apic.h>
11
12struct cpuid_bit {
13 u16 feature;
14 u8 reg;
15 u8 bit;
16 u32 level;
17 u32 sub_leaf;
18};
19
20/* Please keep the leaf sorted by cpuid_bit.level for faster search. */
21static const struct cpuid_bit cpuid_bits[] = {
22 { X86_FEATURE_APERFMPERF, CPUID_ECX, 0, 0x00000006, 0 },
23 { X86_FEATURE_EPB, CPUID_ECX, 3, 0x00000006, 0 },
24 { X86_FEATURE_INTEL_PT, CPUID_EBX, 25, 0x00000007, 0 },
25 { X86_FEATURE_AVX512_4VNNIW, CPUID_EDX, 2, 0x00000007, 0 },
26 { X86_FEATURE_AVX512_4FMAPS, CPUID_EDX, 3, 0x00000007, 0 },
27 { X86_FEATURE_HW_PSTATE, CPUID_EDX, 7, 0x80000007, 0 },
28 { X86_FEATURE_CPB, CPUID_EDX, 9, 0x80000007, 0 },
29 { X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 },
30 { 0, 0, 0, 0, 0 }
31};
32
20void init_scattered_cpuid_features(struct cpuinfo_x86 *c)
21{
22 u32 max_level;
23 u32 regs[4];
24 const struct cpuid_bit *cb;
25
33void init_scattered_cpuid_features(struct cpuinfo_x86 *c)
34{
35 u32 max_level;
36 u32 regs[4];
37 const struct cpuid_bit *cb;
38
26 static const struct cpuid_bit cpuid_bits[] = {
27 { X86_FEATURE_INTEL_PT, CPUID_EBX, 25, 0x00000007, 0 },
28 { X86_FEATURE_AVX512_4VNNIW, CPUID_EDX, 2, 0x00000007, 0 },
29 { X86_FEATURE_AVX512_4FMAPS, CPUID_EDX, 3, 0x00000007, 0 },
30 { X86_FEATURE_APERFMPERF, CPUID_ECX, 0, 0x00000006, 0 },
31 { X86_FEATURE_EPB, CPUID_ECX, 3, 0x00000006, 0 },
32 { X86_FEATURE_HW_PSTATE, CPUID_EDX, 7, 0x80000007, 0 },
33 { X86_FEATURE_CPB, CPUID_EDX, 9, 0x80000007, 0 },
34 { X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 },
35 { 0, 0, 0, 0, 0 }
36 };
37
38 for (cb = cpuid_bits; cb->feature; cb++) {
39
40 /* Verify that the level is valid */
41 max_level = cpuid_eax(cb->level & 0xffff0000);
42 if (max_level < cb->level ||
43 max_level > (cb->level | 0xffff))
44 continue;
45
46 cpuid_count(cb->level, cb->sub_leaf, &regs[CPUID_EAX],
47 &regs[CPUID_EBX], &regs[CPUID_ECX],
48 &regs[CPUID_EDX]);
49
50 if (regs[cb->reg] & (1 << cb->bit))
51 set_cpu_cap(c, cb->feature);
52 }
53}
39 for (cb = cpuid_bits; cb->feature; cb++) {
40
41 /* Verify that the level is valid */
42 max_level = cpuid_eax(cb->level & 0xffff0000);
43 if (max_level < cb->level ||
44 max_level > (cb->level | 0xffff))
45 continue;
46
47 cpuid_count(cb->level, cb->sub_leaf, &regs[CPUID_EAX],
48 &regs[CPUID_EBX], &regs[CPUID_ECX],
49 &regs[CPUID_EDX]);
50
51 if (regs[cb->reg] & (1 << cb->bit))
52 set_cpu_cap(c, cb->feature);
53 }
54}
55
56u32 get_scattered_cpuid_leaf(unsigned int level, unsigned int sub_leaf,
57 enum cpuid_regs_idx reg)
58{
59 const struct cpuid_bit *cb;
60 u32 cpuid_val = 0;
61
62 for (cb = cpuid_bits; cb->feature; cb++) {
63
64 if (level > cb->level)
65 continue;
66
67 if (level < cb->level)
68 break;
69
70 if (reg == cb->reg && sub_leaf == cb->sub_leaf) {
71 if (cpu_has(&boot_cpu_data, cb->feature))
72 cpuid_val |= BIT(cb->bit);
73 }
74 }
75
76 return cpuid_val;
77}
78EXPORT_SYMBOL_GPL(get_scattered_cpuid_leaf);