amd.c (8dd06ef34b6e2f41b29fbf5fc1663780f2524285) amd.c (720909a7abd351535bfb485a0ecce03c2e4467e2)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * (c) 2005-2016 Advanced Micro Devices, Inc.
4 *
5 * Written by Jacob Shin - AMD, Inc.
6 * Maintained by: Borislav Petkov <bp@alien8.de>
7 *
8 * All MC4_MISCi registers are shared between cores on a node.

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902
903 if (m.status & MCI_STATUS_SYNDV)
904 rdmsrl(MSR_AMD64_SMCA_MCx_SYND(bank), m.synd);
905 }
906
907 mce_log(&m);
908}
909
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * (c) 2005-2016 Advanced Micro Devices, Inc.
4 *
5 * Written by Jacob Shin - AMD, Inc.
6 * Maintained by: Borislav Petkov <bp@alien8.de>
7 *
8 * All MC4_MISCi registers are shared between cores on a node.

--- 893 unchanged lines hidden (view full) ---

902
903 if (m.status & MCI_STATUS_SYNDV)
904 rdmsrl(MSR_AMD64_SMCA_MCx_SYND(bank), m.synd);
905 }
906
907 mce_log(&m);
908}
909
910asmlinkage __visible void __irq_entry smp_deferred_error_interrupt(struct pt_regs *regs)
910DEFINE_IDTENTRY_SYSVEC(sysvec_deferred_error)
911{
911{
912 entering_irq();
913 trace_deferred_error_apic_entry(DEFERRED_ERROR_VECTOR);
914 inc_irq_stat(irq_deferred_error_count);
915 deferred_error_int_vector();
916 trace_deferred_error_apic_exit(DEFERRED_ERROR_VECTOR);
912 trace_deferred_error_apic_entry(DEFERRED_ERROR_VECTOR);
913 inc_irq_stat(irq_deferred_error_count);
914 deferred_error_int_vector();
915 trace_deferred_error_apic_exit(DEFERRED_ERROR_VECTOR);
917 exiting_ack_irq();
916 ack_APIC_irq();
918}
919
920/*
921 * Returns true if the logged error is deferred. False, otherwise.
922 */
923static inline bool
924_log_error_bank(unsigned int bank, u32 msr_stat, u32 msr_addr, u64 misc)
925{

--- 599 unchanged lines hidden --- 		917}
918
919/*
920 * Returns true if the logged error is deferred. False, otherwise.
921 */
922static inline bool
923_log_error_bank(unsigned int bank, u32 msr_stat, u32 msr_addr, u64 misc)
924{

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